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authorPhilipp Deppenwiese <zaolin.daisuki@gmail.com>2018-11-23 19:01:12 +0100
committerPatrick Georgi <pgeorgi@google.com>2018-11-28 11:53:32 +0000
commit13e2a326396c18eb56c293c769c2c90955b14a0d (patch)
treedadbb959e889dd4a57604f5d8cd7b98a333fd8e1 /src/drivers
parentd379840333df3901a4d8b76e8edb399d1a5e91de (diff)
downloadcoreboot-13e2a326396c18eb56c293c769c2c90955b14a0d.tar.xz
soc/fsp_broadwell_de: Add early microcode updates
Add support for updating microcodes on FSP 1.0 platforms before memory is initialized. This is a requirement to fill other FIT entries except for microcode updates. Change-Id: Ie31acaf0fc41c51b9edf65b981d43d7732661770 Signed-off-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Reviewed-on: https://review.coreboot.org/c/29819 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Huang Jin <huang.jin@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/drivers')
-rw-r--r--src/drivers/intel/fsp1_0/fsp_util.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/drivers/intel/fsp1_0/fsp_util.c b/src/drivers/intel/fsp1_0/fsp_util.c
index a09b1b141c..71f64161cc 100644
--- a/src/drivers/intel/fsp1_0/fsp_util.c
+++ b/src/drivers/intel/fsp1_0/fsp_util.c
@@ -22,6 +22,7 @@
#include <lib.h> // hexdump
#include <ip_checksum.h>
#include <timestamp.h>
+#include <cpu/intel/microcode.h>
#ifndef __PRE_RAM__
/* Globals pointers for FSP structures */
@@ -75,6 +76,10 @@ void __noreturn fsp_early_init (FSP_INFO_HEADER *fsp_ptr)
UPD_DATA_REGION fsp_upd_data;
#endif
+ /* Load microcode before RAM init */
+ if (IS_ENABLED(CONFIG_SUPPORT_CPU_UCODE_IN_CBFS))
+ intel_update_microcode_from_cbfs();
+
memset((void *)&FspRtBuffer, 0, sizeof(FSP_INIT_RT_BUFFER));
FspRtBuffer.Common.StackTop = (u32 *)CONFIG_RAMTOP;
FspInitParams.NvsBufferPtr = NULL;