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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2016-06-27 14:50:27 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2016-07-10 11:16:07 +0200 |
| commit | e5c00a5d2c71cc7689e783f26a6031997857d661 (patch) | |
| tree | bca1e3ede5790272720190ed0f77d4e6c571e7a8 /src/drivers | |
| parent | 70cd54310b98f422b7d66a0e0932d53edec40bb7 (diff) | |
| download | coreboot-e5c00a5d2c71cc7689e783f26a6031997857d661.tar.xz | |
intel post-car: Consolidate choose_top_of_stack()
Change-Id: I2c49d68ea9a8f52737b6064bc4fa703bdb1af1df
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/15463
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/drivers')
| -rw-r--r-- | src/drivers/intel/fsp1_1/Kconfig | 4 | ||||
| -rw-r--r-- | src/drivers/intel/fsp1_1/stack.c | 23 |
2 files changed, 3 insertions, 24 deletions
diff --git a/src/drivers/intel/fsp1_1/Kconfig b/src/drivers/intel/fsp1_1/Kconfig index 86f6c7b99e..59b47978dd 100644 --- a/src/drivers/intel/fsp1_1/Kconfig +++ b/src/drivers/intel/fsp1_1/Kconfig @@ -99,10 +99,6 @@ config GOP_SUPPORT bool "Enable GOP support" default n -config ROMSTAGE_RAM_STACK_SIZE - hex "Size of the romstage RAM stack in bytes" - default 0x5000 - config USE_GENERIC_FSP_CAR_INC bool default n diff --git a/src/drivers/intel/fsp1_1/stack.c b/src/drivers/intel/fsp1_1/stack.c index 65ba235a90..8d0759a393 100644 --- a/src/drivers/intel/fsp1_1/stack.c +++ b/src/drivers/intel/fsp1_1/stack.c @@ -21,23 +21,7 @@ #include <fsp/romstage.h> #include <fsp/stack.h> #include <stdlib.h> - -const unsigned long romstage_ram_stack_size = CONFIG_ROMSTAGE_RAM_STACK_SIZE; - -/* - * Romstage needs quite a bit of stack for decompressing images since the lzma - * lib keeps its state on the stack during romstage. - */ -static unsigned long choose_top_of_stack(void) -{ - unsigned long stack_top; - - /* cbmem_add() does a find() before add(). */ - stack_top = (unsigned long)cbmem_add(CBMEM_ID_ROMSTAGE_RAM_STACK, - romstage_ram_stack_size); - stack_top += romstage_ram_stack_size; - return stack_top; -} +#include <program_loading.h> /* * setup_stack_and_mtrrs() determines the stack to use after @@ -57,7 +41,7 @@ void *setup_stack_and_mtrrs(void) soc_display_mtrrs(); /* Top of stack needs to be aligned to a 8-byte boundary. */ - top_of_stack = choose_top_of_stack(); + top_of_stack = romstage_ram_stack_top(); slot = (void *)top_of_stack; num_mtrrs = 0; max_mtrrs = soc_get_variable_mtrr_count(NULL); @@ -68,8 +52,7 @@ void *setup_stack_and_mtrrs(void) */ mtrr_mask_upper = (1 << ((cpuid_eax(0x80000008) & 0xff) - 32)) - 1; alignment = mmap_region_granularity(); - aligned_ram = ALIGN_DOWN(top_of_stack - romstage_ram_stack_size, - alignment); + aligned_ram = ALIGN_DOWN(romstage_ram_stack_bottom(), alignment); /* * The order for each MTRR is value then base with upper 32-bits of |