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authorNico Huber <nico.huber@secunet.com>2017-05-22 15:58:03 +0200
committerNico Huber <nico.h@gmx.de>2017-06-08 14:58:29 +0200
commit2e7f6ccafc3e633ed9001b3c3863253ee0630429 (patch)
treef8e8ff0b026fe9adf97b7cdc135665044f614b5a /src/drivers
parentd4ebeaf475dc1137f489f12ffa4e55d914238662 (diff)
downloadcoreboot-2e7f6ccafc3e633ed9001b3c3863253ee0630429.tar.xz
fsp/gop: Add running the GOP to the choice of gfx init
The new config choice is called RUN_FSP_GOP. Some things had to happen on the road: * Drop confusing config GOP_SUPPORT, * Add HAVE_FSP_GOP to chipsets that support it, * Make running the GOP an option for FSP2.0 by returning 0 in random VBT getters. Change-Id: I92f88424004a4c0abf1f39cc02e2a146bddbcedf Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/19815 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/drivers')
-rw-r--r--src/drivers/intel/fsp1_1/Kconfig7
-rw-r--r--src/drivers/intel/fsp1_1/Makefile.inc4
-rw-r--r--src/drivers/intel/fsp1_1/ramstage.c4
-rw-r--r--src/drivers/intel/fsp2_0/Kconfig1
-rw-r--r--src/drivers/intel/fsp2_0/Makefile.inc2
-rw-r--r--src/drivers/intel/fsp2_0/include/fsp/util.h4
6 files changed, 10 insertions, 12 deletions
diff --git a/src/drivers/intel/fsp1_1/Kconfig b/src/drivers/intel/fsp1_1/Kconfig
index 1b3061c2d4..ab94a0a8ec 100644
--- a/src/drivers/intel/fsp1_1/Kconfig
+++ b/src/drivers/intel/fsp1_1/Kconfig
@@ -16,6 +16,7 @@
config PLATFORM_USES_FSP1_1
bool
select UEFI_2_4_BINDING
+ select ADD_VBT_DATA_FILE if RUN_FSP_GOP
help
Does the code require the Intel Firmware Support Package?
@@ -88,12 +89,6 @@ config FSP_USES_UPD
If this FSP uses UPD/VPD data regions, select this in the chipset
Kconfig.
-config GOP_SUPPORT
- bool "Enable GOP support"
- default n
- select ADD_VBT_DATA_FILE
- select HAVE_LINEAR_FRAMEBUFFER
-
config USE_GENERIC_FSP_CAR_INC
bool
default n
diff --git a/src/drivers/intel/fsp1_1/Makefile.inc b/src/drivers/intel/fsp1_1/Makefile.inc
index 960df74b70..d0e2856c37 100644
--- a/src/drivers/intel/fsp1_1/Makefile.inc
+++ b/src/drivers/intel/fsp1_1/Makefile.inc
@@ -32,13 +32,13 @@ romstage-y += stack.c
romstage-y += stage_cache.c
romstage-$(CONFIG_MMA) += mma_core.c
-ramstage-$(CONFIG_GOP_SUPPORT) += fsp_gop.c
+ramstage-$(CONFIG_RUN_FSP_GOP) += fsp_gop.c
ramstage-y += fsp_relocate.c
ramstage-y += fsp_util.c
ramstage-y += hob.c
ramstage-y += ramstage.c
ramstage-y += stage_cache.c
-ramstage-$(CONFIG_GOP_SUPPORT) += vbt.c
+ramstage-$(CONFIG_RUN_FSP_GOP) += vbt.c
ramstage-$(CONFIG_MMA) += mma_core.c
CPPFLAGS_common += -Isrc/drivers/intel/fsp1_1/include
diff --git a/src/drivers/intel/fsp1_1/ramstage.c b/src/drivers/intel/fsp1_1/ramstage.c
index 7d9ff8edf0..563a030220 100644
--- a/src/drivers/intel/fsp1_1/ramstage.c
+++ b/src/drivers/intel/fsp1_1/ramstage.c
@@ -119,7 +119,7 @@ void fsp_run_silicon_init(FSP_INFO_HEADER *fsp_info_header, int is_s3_wakeup)
soc_silicon_init_params(&silicon_init_params);
/* Locate VBT and pass to FSP GOP */
- if (IS_ENABLED(CONFIG_GOP_SUPPORT))
+ if (IS_ENABLED(CONFIG_RUN_FSP_GOP))
load_vbt(is_s3_wakeup, &silicon_init_params);
mainboard_silicon_init_params(&silicon_init_params);
@@ -141,7 +141,7 @@ void fsp_run_silicon_init(FSP_INFO_HEADER *fsp_info_header, int is_s3_wakeup)
printk(BIOS_DEBUG, "FspSiliconInit returned 0x%08x\n", status);
/* Mark graphics init done after SiliconInit if VBT was provided */
-#if IS_ENABLED(CONFIG_GOP_SUPPORT)
+#if IS_ENABLED(CONFIG_RUN_FSP_GOP)
/* GraphicsConfigPtr doesn't exist in Quark X1000's FSP, so this needs
* to be #if'd out instead of using if (). */
if (silicon_init_params.GraphicsConfigPtr)
diff --git a/src/drivers/intel/fsp2_0/Kconfig b/src/drivers/intel/fsp2_0/Kconfig
index 0c6b229ccb..864b3a1a2d 100644
--- a/src/drivers/intel/fsp2_0/Kconfig
+++ b/src/drivers/intel/fsp2_0/Kconfig
@@ -16,7 +16,6 @@
config PLATFORM_USES_FSP2_0
bool
select UDK_2015_BINDING
- select HAVE_LINEAR_FRAMEBUFFER
help
Include FSP 2.0 wrappers and functionality
diff --git a/src/drivers/intel/fsp2_0/Makefile.inc b/src/drivers/intel/fsp2_0/Makefile.inc
index f083948480..cdf6146d51 100644
--- a/src/drivers/intel/fsp2_0/Makefile.inc
+++ b/src/drivers/intel/fsp2_0/Makefile.inc
@@ -27,7 +27,7 @@ romstage-$(CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM) += stage_cache.c
romstage-$(CONFIG_MMA) += mma_core.c
ramstage-y += debug.c
-ramstage-y += graphics.c
+ramstage-$(CONFIG_RUN_FSP_GOP) += graphics.c
ramstage-y += hand_off_block.c
ramstage-$(CONFIG_DISPLAY_FSP_HEADER) += header_display.c
ramstage-$(CONFIG_DISPLAY_HOBS) += hob_display.c
diff --git a/src/drivers/intel/fsp2_0/include/fsp/util.h b/src/drivers/intel/fsp2_0/include/fsp/util.h
index 13c6ab27a7..86e637cec2 100644
--- a/src/drivers/intel/fsp2_0/include/fsp/util.h
+++ b/src/drivers/intel/fsp2_0/include/fsp/util.h
@@ -85,7 +85,11 @@ enum cb_err fsp_validate_component(struct fsp_header *hdr,
const struct region_device *rdev);
/* Load a vbt.bin file for graphics. Returns 0 if a valid VBT is not found. */
+#if IS_ENABLED(CONFIG_RUN_FSP_GOP)
uintptr_t fsp_load_vbt(void);
+#else
+static inline uintptr_t fsp_load_vbt(void) { return 0; }
+#endif
/* Get igd framebuffer bar from SoC */
uintptr_t fsp_soc_get_igd_bar(void);