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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-01-23 16:46:35 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-07-04 09:36:19 +0000
commit9c0e14e7c43e85e99c0bbfdff72019d908de1711 (patch)
treeef1a0ffee2d7a542a2c8ccb8d2f8cba74114628b /src/drivers
parentdace2498ecfadf645599aaa3ba8fef8cbb111c2d (diff)
downloadcoreboot-9c0e14e7c43e85e99c0bbfdff72019d908de1711.tar.xz
device/pci_ops: Define pci_find_capability() just once
Wrap the simple romstage implementation to be called from ramstage. Change-Id: Iadadf3d550416850d6c37233bd4eda025f4d3960 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31755 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/drivers')
-rw-r--r--src/drivers/usb/pci_ehci.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/drivers/usb/pci_ehci.c b/src/drivers/usb/pci_ehci.c
index 5621b37da9..34684cb09a 100644
--- a/src/drivers/usb/pci_ehci.c
+++ b/src/drivers/usb/pci_ehci.c
@@ -49,7 +49,7 @@ int ehci_debug_hw_enable(unsigned int *base, unsigned int *dbg_offset)
if (class != PCI_EHCI_CLASSCODE)
return -1;
- u8 pm_cap = pci_find_capability(dev, PCI_CAP_ID_PM);
+ u8 pm_cap = pci_s_find_capability(dbg_dev, PCI_CAP_ID_PM);
if (pm_cap) {
u16 pm_ctrl = pci_read_config16(dev, pm_cap + PCI_PM_CTRL);
/* Set to D0 and disable PM events. */
@@ -58,7 +58,7 @@ int ehci_debug_hw_enable(unsigned int *base, unsigned int *dbg_offset)
pci_write_config16(dev, pm_cap + PCI_PM_CTRL, pm_ctrl);
}
- u8 pos = pci_find_capability(dev, PCI_CAP_ID_EHCI_DEBUG);
+ u8 pos = pci_s_find_capability(dbg_dev, PCI_CAP_ID_EHCI_DEBUG);
if (!pos)
return -1;