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| author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2017-08-10 15:17:26 -0600 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2017-08-17 17:52:21 +0000 |
| commit | a102a029c5706a97ca1df6f0939def49b851a656 (patch) | |
| tree | dffbc4c23ef158dd9ce96637c836442c1d107d8e /src/drivers | |
| parent | d0269a636dedbb5ea219f20b5dfa1bebb60720eb (diff) | |
| download | coreboot-a102a029c5706a97ca1df6f0939def49b851a656.tar.xz | |
arch/x86: Make postcar TempRamExit call generic
Move the FSP-specific call for tearing down cache-as-RAM out of
postcar.c and replace it with an empty weak function.
This patch omits checking if (IS_ENABLED(CONFIG_FSP_CAR)). The
temp_ram_exit.c file with the real fsp_temp_ram_exit() is only built
when CONFIG_FSP_CAR is true.
Change-Id: I9adbb1f2a7b2ff50d9f36d5a3640f63410c09479
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/20965
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/drivers')
| -rw-r--r-- | src/drivers/intel/fsp2_0/temp_ram_exit.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/drivers/intel/fsp2_0/temp_ram_exit.c b/src/drivers/intel/fsp2_0/temp_ram_exit.c index 21eb367e8c..6b3a999f16 100644 --- a/src/drivers/intel/fsp2_0/temp_ram_exit.c +++ b/src/drivers/intel/fsp2_0/temp_ram_exit.c @@ -47,3 +47,8 @@ void fsp_temp_ram_exit(void) die("TempRamExit returned an error!\n"); } } + +void late_car_teardown(void) +{ + fsp_temp_ram_exit(); +} |