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authorAaron Durbin <adurbin@chromium.org>2018-01-22 21:31:48 -0700
committerAaron Durbin <adurbin@chromium.org>2018-01-24 05:03:10 +0000
commitb7d79cddf0287a2e925d2003ef8d0cde6bbbae2a (patch)
treed5c79a089bd5ea0d0d5fdc2830e93f8bc3d07108 /src/drivers
parent9aee8194c46f31eeda6ee7419e40cad2de47187e (diff)
downloadcoreboot-b7d79cddf0287a2e925d2003ef8d0cde6bbbae2a.tar.xz
drives/i2c/designware: incorporate device_operations support
In ramstage the device_operations are needed for the i2c designware host controller. Move the intel/common/block/i2c implementation into the generic driver so other platforms can take advantage of it. BUG=b:72121803 Change-Id: Id249933fadcc016bfba00e7a6d65f56dfc220724 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/23372 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Diffstat (limited to 'src/drivers')
-rw-r--r--src/drivers/i2c/designware/dw_i2c.c124
-rw-r--r--src/drivers/i2c/designware/dw_i2c.h25
2 files changed, 146 insertions, 3 deletions
diff --git a/src/drivers/i2c/designware/dw_i2c.c b/src/drivers/i2c/designware/dw_i2c.c
index 75f8871d56..aeddbbcf01 100644
--- a/src/drivers/i2c/designware/dw_i2c.c
+++ b/src/drivers/i2c/designware/dw_i2c.c
@@ -19,10 +19,8 @@
#include <arch/io.h>
#include <console/console.h>
#include <device/device.h>
+#include <device/i2c_bus.h>
#include <device/i2c_simple.h>
-#include <device/pci.h>
-#include <device/pci_def.h>
-#include <device/pci_ids.h>
#include <string.h>
#include <timer.h>
#include "dw_i2c.h"
@@ -726,3 +724,123 @@ int dw_i2c_init(unsigned int bus, const struct dw_i2c_bus_config *bcfg)
return 0;
}
+
+/*
+ * Write ACPI object to describe speed configuration.
+ *
+ * ACPI Object: Name ("xxxx", Package () { scl_lcnt, scl_hcnt, sda_hold }
+ *
+ * SSCN: I2C_SPEED_STANDARD
+ * FMCN: I2C_SPEED_FAST
+ * FPCN: I2C_SPEED_FAST_PLUS
+ * HSCN: I2C_SPEED_HIGH
+ */
+static void dw_i2c_acpi_write_speed_config(
+ const struct dw_i2c_speed_config *config)
+{
+ if (!config)
+ return;
+ if (!config->scl_lcnt && !config->scl_hcnt && !config->sda_hold)
+ return;
+
+ if (config->speed >= I2C_SPEED_HIGH)
+ acpigen_write_name("HSCN");
+ else if (config->speed >= I2C_SPEED_FAST_PLUS)
+ acpigen_write_name("FPCN");
+ else if (config->speed >= I2C_SPEED_FAST)
+ acpigen_write_name("FMCN");
+ else
+ acpigen_write_name("SSCN");
+
+ /* Package () { scl_lcnt, scl_hcnt, sda_hold } */
+ acpigen_write_package(3);
+ acpigen_write_word(config->scl_hcnt);
+ acpigen_write_word(config->scl_lcnt);
+ acpigen_write_dword(config->sda_hold);
+ acpigen_pop_len();
+}
+
+/*
+ * The device should already be enabled and out of reset,
+ * either from early init in coreboot or SiliconInit in FSP.
+ */
+void dw_i2c_dev_init(struct device *dev)
+{
+ const struct dw_i2c_bus_config *config;
+ int bus = dw_i2c_soc_dev_to_bus(dev);
+
+ if (bus < 0)
+ return;
+
+ config = dw_i2c_get_soc_cfg(bus, dev);
+
+ if (!config)
+ return;
+
+ dw_i2c_init(bus, config);
+}
+
+/*
+ * Generate I2C timing information into the SSDT for the OS driver to consume,
+ * optionally applying override values provided by the caller.
+ */
+void dw_i2c_acpi_fill_ssdt(struct device *dev)
+{
+ const struct dw_i2c_bus_config *bcfg;
+ uintptr_t dw_i2c_addr;
+ struct dw_i2c_speed_config sgen;
+ enum i2c_speed speeds[DW_I2C_SPEED_CONFIG_COUNT] = {
+ I2C_SPEED_STANDARD,
+ I2C_SPEED_FAST,
+ I2C_SPEED_FAST_PLUS,
+ I2C_SPEED_HIGH,
+ };
+ int i, bus;
+ const char *path;
+
+ if (!dev->enabled)
+ return;
+
+ bus = dw_i2c_soc_dev_to_bus(dev);
+
+ if (bus < 0)
+ return;
+
+ bcfg = dw_i2c_get_soc_cfg(bus, dev);
+
+ if (!bcfg)
+ return;
+
+ dw_i2c_addr = dw_i2c_base_address(bus);
+ if (!dw_i2c_addr)
+ return;
+
+ path = acpi_device_path(dev);
+ if (!path)
+ return;
+
+ acpigen_write_scope(path);
+
+ /* Report timing values for the OS driver */
+ for (i = 0; i < DW_I2C_SPEED_CONFIG_COUNT; i++) {
+ /* Generate speed config. */
+ if (dw_i2c_gen_speed_config(dw_i2c_addr, speeds[i], bcfg,
+ &sgen) < 0)
+ continue;
+
+ /* Generate ACPI based on selected speed config */
+ dw_i2c_acpi_write_speed_config(&sgen);
+ }
+
+ acpigen_pop_len();
+}
+
+static int dw_i2c_dev_transfer(struct device *dev,
+ const struct i2c_msg *msg, size_t count)
+{
+ return dw_i2c_transfer(dw_i2c_soc_dev_to_bus(dev), msg, count);
+}
+
+const struct i2c_bus_operations dw_i2c_bus_ops = {
+ .transfer = dw_i2c_dev_transfer,
+};
diff --git a/src/drivers/i2c/designware/dw_i2c.h b/src/drivers/i2c/designware/dw_i2c.h
index 83e0e6d5e6..c97ed7785f 100644
--- a/src/drivers/i2c/designware/dw_i2c.h
+++ b/src/drivers/i2c/designware/dw_i2c.h
@@ -137,4 +137,29 @@ int dw_i2c_transfer(unsigned int bus,
const struct i2c_msg *segments,
size_t count);
+/*
+ * Map an i2c host controller device to a logical bus number.
+ * Return value:
+ * -1 = failure
+ * >=0 = logical bus number
+ */
+int dw_i2c_soc_dev_to_bus(struct device *dev);
+
+/*
+ * Common device_operations implementation to initialize the i2c host
+ * controller.
+ */
+void dw_i2c_dev_init(struct device *dev);
+
+/*
+ * Common device_operations implementation to fill ACPI SSDT table for i2c
+ * host controller.
+ */
+void dw_i2c_acpi_fill_ssdt(struct device *dev);
+
+/*
+ * Common device_operations implementation for i2c host controller ops.
+ */
+extern const struct i2c_bus_operations dw_i2c_bus_ops;
+
#endif /* __DRIVERS_I2C_DESIGNWARE_I2C_H__ */