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authorMike Banon <mikebdp2@gmail.com>2019-01-12 20:16:38 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-01-14 02:25:46 +0000
commitd06d5256e29f70a798ce68295742b2880c119f4d (patch)
tree1c06ace9484f0e6a0bed636f97d2015c46d17281 /src/drivers
parent8a1cbf00aa11d27c492129837af959c03c6db15e (diff)
downloadcoreboot-d06d5256e29f70a798ce68295742b2880c119f4d.tar.xz
drivers/spi/amic.c: Add the rest of >=1MB AMIC A25 chips
Required for ACPI S3 suspend support at some motherboards. Synchronizing with flashchips.c/h flashrom source code. Signed-off-by: Mike Banon <mikebdp2@gmail.com> Change-Id: Ic5bd3e43e0d3fd5f454fae71b307c0682f203d5c Reviewed-on: https://review.coreboot.org/c/30884 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/drivers')
-rw-r--r--src/drivers/spi/amic.c64
1 files changed, 64 insertions, 0 deletions
diff --git a/src/drivers/spi/amic.c b/src/drivers/spi/amic.c
index 64bdab3fb0..b0e926e898 100644
--- a/src/drivers/spi/amic.c
+++ b/src/drivers/spi/amic.c
@@ -42,6 +42,38 @@ struct amic_spi_flash_params {
static const struct amic_spi_flash_params amic_spi_flash_table[] = {
{
+ .id = 0x2015,
+ .l2_page_size = 8,
+ .pages_per_sector = 16,
+ .sectors_per_block = 16,
+ .nr_blocks = 32,
+ .name = "A25L16PU",
+ },
+ {
+ .id = 0x2025,
+ .l2_page_size = 8,
+ .pages_per_sector = 16,
+ .sectors_per_block = 16,
+ .nr_blocks = 32,
+ .name = "A25L16PT",
+ },
+ {
+ .id = 0x3014,
+ .l2_page_size = 8,
+ .pages_per_sector = 16,
+ .sectors_per_block = 16,
+ .nr_blocks = 16,
+ .name = "A25L080",
+ },
+ {
+ .id = 0x3015,
+ .l2_page_size = 8,
+ .pages_per_sector = 16,
+ .sectors_per_block = 16,
+ .nr_blocks = 32,
+ .name = "A25L016",
+ },
+ {
.id = 0x3016,
.l2_page_size = 8,
.pages_per_sector = 16,
@@ -49,6 +81,38 @@ static const struct amic_spi_flash_params amic_spi_flash_table[] = {
.nr_blocks = 64,
.name = "A25L032",
},
+ {
+ .id = 0x4014,
+ .l2_page_size = 8,
+ .pages_per_sector = 16,
+ .sectors_per_block = 16,
+ .nr_blocks = 16,
+ .name = "A25LQ080",
+ },
+ {
+ .id = 0x4015,
+ .l2_page_size = 8,
+ .pages_per_sector = 16,
+ .sectors_per_block = 16,
+ .nr_blocks = 32,
+ .name = "A25LQ16",
+ },
+ {
+ .id = 0x4016,
+ .l2_page_size = 8,
+ .pages_per_sector = 16,
+ .sectors_per_block = 16,
+ .nr_blocks = 64,
+ .name = "A25LQ032",
+ },
+ {
+ .id = 0x4017,
+ .l2_page_size = 8,
+ .pages_per_sector = 16,
+ .sectors_per_block = 16,
+ .nr_blocks = 128,
+ .name = "A25LQ64",
+ },
};
static int amic_write(const struct spi_flash *flash, u32 offset, size_t len,