drivers/uart: Enable debug serial output during postcar

Build the UART drivers for the postcar stage.

TEST=Build and run on Galileo Gen2

Change-Id: I8bf51135ab7e62fa4bc3e8d45583f2feac56942f
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/15843
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

1 files changed, 5 insertions, 0 deletions

diff --git a/src/drivers/uart/Makefile.inc b/src/drivers/uart/Makefile.inc
index 4b2aa53507..a39cbefed1 100644
--- a/src/drivers/uart/Makefile.inc
+++ b/src/drivers/uart/Makefile.inc
@@ -1,6 +1,7 @@
 ifeq ($(CONFIG_DRIVERS_UART),y)
 
 romstage-y += util.c
+postcar-y += util.c
 ramstage-y += util.c
 bootblock-y += util.c
 verstage-y += util.c
@@ -13,6 +14,7 @@ ifeq ($(CONFIG_DRIVERS_UART_8250IO),y)
 bootblock-y += uart8250io.c
 verstage-y += uart8250io.c
 romstage-y += uart8250io.c
+postcar-y += uart8250io.c
 ramstage-y += uart8250io.c
 smm-$(CONFIG_DEBUG_SMI) += uart8250io.c
 endif
@@ -21,18 +23,21 @@ ifeq ($(CONFIG_DRIVERS_UART_8250MEM),y)
 bootblock-y += uart8250mem.c
 verstage-y += uart8250mem.c
 romstage-y += uart8250mem.c
+postcar-y += uart8250mem.c
 ramstage-y += uart8250mem.c
 smm-$(CONFIG_DEBUG_SMI) += uart8250mem.c
 endif
 
 ifeq ($(CONFIG_DRIVERS_UART_OXPCIE),y)
 ramstage-y += oxpcie_early.c oxpcie.c
+postcar-y += oxpcie_early.c
 romstage-y += oxpcie_early.c
 endif
 
 ifeq ($(CONFIG_DRIVERS_UART_PL011),y)
 bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += pl011.c
 romstage-y += pl011.c
+postcar-y += pl011.c
 ramstage-y += pl011.c
 endif