diff options
author | Edward Hill <ecgh@chromium.org> | 2019-02-04 14:42:03 -0700 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2019-02-11 12:23:05 +0000 |
commit | f14445c145776877d140a17548b094467303e77e (patch) | |
tree | e52fc707846b841fdd948d42fa7c78f7de03d999 /src/ec/google/chromeec/acpi | |
parent | 5349dd14d6a65bac8c3244f1e0903f3724d7d5ed (diff) | |
download | coreboot-f14445c145776877d140a17548b094467303e77e.tar.xz |
mb/google/kahlee: Use GPIO_10 for EC_SYNC_IRQ
Use AGPIO 10 as the EC sync interrupt for MKBP events for sensor data.
On this platform, interrupts are routed via the GPIO controller so need to be
registered using GpioInt instead of Interrupt.
BUG=b:123750725
BRANCH=grunt
TEST=MKBP events still received (with matching EC and kernel changes)
Change-Id: If499d24511bbaa7054207b7e0b98445723332c4f
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://review.coreboot.org/c/31278
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Enrico Granata <egranata@chromium.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/ec/google/chromeec/acpi')
-rw-r--r-- | src/ec/google/chromeec/acpi/cros_ec.asl | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/src/ec/google/chromeec/acpi/cros_ec.asl b/src/ec/google/chromeec/acpi/cros_ec.asl index a5f9202dc8..d41071e731 100644 --- a/src/ec/google/chromeec/acpi/cros_ec.asl +++ b/src/ec/google/chromeec/acpi/cros_ec.asl @@ -32,6 +32,17 @@ Device (CREC) }) #endif +#ifdef EC_ENABLE_SYNC_IRQ_GPIO + Name (_CRS, ResourceTemplate () + { + GpioInt (Level, ActiveLow, Exclusive, PullDefault, 0x0000, + "\\_SB.GPIO", 0x00, ResourceConsumer, ,) + { + EC_SYNC_IRQ + } + }) +#endif + #ifdef EC_ENABLE_MKBP_DEVICE Device (CKSC) { |