diff options
author | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2020-01-22 16:52:13 -0700 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2020-02-18 14:59:17 +0000 |
commit | eb3cd856106dae68da4aae39f9954fb90770e8a2 (patch) | |
tree | c824581892f358406184f02f355ad20c9adf6b1b /src/ec/google/chromeec/ec.c | |
parent | 214fb9b511faaa59716a1b65a43438781f6237ef (diff) | |
download | coreboot-eb3cd856106dae68da4aae39f9954fb90770e8a2.tar.xz |
ec/google/chromeec: Add SSDT generator for ChromeOS EC
Upcoming patches for the Linux kernel (5.6 ?) would like to consume
information about the USB PD ports that are attached to the device. This
information is obtained from the CrOS EC and exposed in the SSDT ACPI
table.
Also, the device enable for this PCI device is moved from ec_lpc.c to
a new file, ec_chip.c, where EC-related ACPI methods can live. It
still allows other code to call functions on device enable (so that
PnP enable for the LPC device still gets called).
BUG=b:146506369
BRANCH=none
TEST=Verify the SSDT contains the expected information
Change-Id: I729caecd64d9320fb02c0404c8315122f010970b
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38541
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/ec/google/chromeec/ec.c')
-rw-r--r-- | src/ec/google/chromeec/ec.c | 27 |
1 files changed, 25 insertions, 2 deletions
diff --git a/src/ec/google/chromeec/ec.c b/src/ec/google/chromeec/ec.c index 1d351c5875..81e68d0f96 100644 --- a/src/ec/google/chromeec/ec.c +++ b/src/ec/google/chromeec/ec.c @@ -29,9 +29,7 @@ #include <stdlib.h> #include <timer.h> -#include "chip.h" #include "ec.h" -#include "ec_commands.h" #define INVALID_HCMD 0xFF @@ -1527,3 +1525,28 @@ int google_chromeec_wait_for_displayport(long timeout) return 1; } + +#if CONFIG(HAVE_ACPI_TABLES) && !DEVTREE_EARLY +static struct device_operations ec_chromeec_ops = { + .acpi_name = google_chromeec_acpi_name, + .acpi_fill_ssdt_generator = google_chromeec_fill_ssdt_generator, +}; +#endif + +/* ec_lpc, ec_spi, or ec_i2c can override this */ +__weak void google_ec_enable_extra(struct device *dev) +{ +} + +static void google_chromeec_enable(struct device *dev) +{ +#if CONFIG(HAVE_ACPI_TABLES) && !DEVTREE_EARLY + dev->ops = &ec_chromeec_ops; +#endif + google_ec_enable_extra(dev); +} + +struct chip_operations ec_google_chromeec_ops = { + CHIP_NAME("Google Chrome EC") + .enable_dev = google_chromeec_enable +}; |