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author | Aaron Durbin <adurbin@chromium.org> | 2016-05-10 17:00:06 -0500 |
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committer | Aaron Durbin <adurbin@chromium.org> | 2016-05-11 21:33:17 +0200 |
commit | fbb3e6c10873d0c55dc477c436d8352b915895ef (patch) | |
tree | 4adf63e8f275064cbc58d9387e3b023bdbc7714d /src/ec/google/chromeec/ec.h | |
parent | bf1e48194494b52a06945490a4fbf322059e7ebd (diff) | |
download | coreboot-fbb3e6c10873d0c55dc477c436d8352b915895ef.tar.xz |
ec/google/chromeec: provide way to query ioport range
In order to provide other stages access to the ioport range
required by the ChromeEC provide google_chromeec_ioport_range()
function to fill in the details. Currently, the ioport range is
only consumed by the LPC implemenation. Also allow ec_lpc.c to be built
for the bootblock stage.
Change-Id: I6c181b42e80e71fe07e8fa90df783107287f16ad
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/14769
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/ec/google/chromeec/ec.h')
-rw-r--r-- | src/ec/google/chromeec/ec.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/ec/google/chromeec/ec.h b/src/ec/google/chromeec/ec.h index 85f41adf25..19507bb86f 100644 --- a/src/ec/google/chromeec/ec.h +++ b/src/ec/google/chromeec/ec.h @@ -21,6 +21,9 @@ #include <stdint.h> #include "ec_commands.h" +/* Fill in base and size of the IO port resources used. */ +void google_chromeec_ioport_range(uint16_t *base, size_t *size); + #ifndef __PRE_RAM__ int google_chromeec_i2c_xfer(uint8_t chip, uint8_t addr, int alen, uint8_t *buffer, int len, int is_read); |