diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2016-05-10 17:00:06 -0500 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2016-05-11 21:33:17 +0200 |
| commit | fbb3e6c10873d0c55dc477c436d8352b915895ef (patch) | |
| tree | 4adf63e8f275064cbc58d9387e3b023bdbc7714d /src/ec/google/chromeec/ec_lpc.c | |
| parent | bf1e48194494b52a06945490a4fbf322059e7ebd (diff) | |
| download | coreboot-fbb3e6c10873d0c55dc477c436d8352b915895ef.tar.xz | |
ec/google/chromeec: provide way to query ioport range
In order to provide other stages access to the ioport range
required by the ChromeEC provide google_chromeec_ioport_range()
function to fill in the details. Currently, the ioport range is
only consumed by the LPC implemenation. Also allow ec_lpc.c to be built
for the bootblock stage.
Change-Id: I6c181b42e80e71fe07e8fa90df783107287f16ad
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/14769
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/ec/google/chromeec/ec_lpc.c')
| -rw-r--r-- | src/ec/google/chromeec/ec_lpc.c | 36 |
1 files changed, 25 insertions, 11 deletions
diff --git a/src/ec/google/chromeec/ec_lpc.c b/src/ec/google/chromeec/ec_lpc.c index f9d0f8bfc7..06b506b059 100644 --- a/src/ec/google/chromeec/ec_lpc.c +++ b/src/ec/google/chromeec/ec_lpc.c @@ -367,6 +367,26 @@ uint8_t google_chromeec_get_switches(void) return read_byte(EC_LPC_ADDR_MEMMAP + EC_MEMMAP_SWITCHES); } +void google_chromeec_ioport_range(uint16_t *out_base, size_t *out_size) +{ + uint16_t base; + size_t size; + + if (IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC_MEC)) { + base = MEC_EMI_BASE; + size = MEC_EMI_SIZE; + } else { + base = EC_HOST_CMD_REGION0; + size = 2 * EC_HOST_CMD_REGION_SIZE; + /* Make sure MEMMAP region follows host cmd region. */ + assert(base + size == EC_LPC_ADDR_MEMMAP); + size += EC_MEMMAP_SIZE; + } + + *out_base = base; + *out_size = size; +} + #ifdef __PRE_RAM__ int google_chromeec_command(struct chromeec_command *cec_command) @@ -423,19 +443,13 @@ static void lpc_ec_read_resources(struct device *dev) { unsigned int idx = 0; struct resource * res; + uint16_t base; + size_t size; - + google_chromeec_ioport_range(&base, &size); res = new_resource(dev, idx++); - if (IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC_MEC)) { - res->base = MEC_EMI_BASE; - res->size = MEC_EMI_SIZE; - } else { - res->base = EC_HOST_CMD_REGION0; - res->size = 2 * EC_HOST_CMD_REGION_SIZE; - /* Make sure MEMMAP region follows host cmd region. */ - assert(res->base + res->size == EC_LPC_ADDR_MEMMAP); - res->size += EC_MEMMAP_SIZE; - } + res->base = base; + res->size = size; res->flags = IORESOURCE_IO | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; } |