diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2017-02-06 10:08:45 -0600 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2017-02-07 17:45:05 +0100 |
| commit | 96a4317fa9543a0d07e34bae3d40da810554411f (patch) | |
| tree | d1d0d2061576df29c106341ed0cb85bacb5a5a2c /src/ec/google | |
| parent | 4f803ac28f4672cbf9ea8de92fb4ed680e582724 (diff) | |
| download | coreboot-96a4317fa9543a0d07e34bae3d40da810554411f.tar.xz | |
ec/google/chromeec: let platform prepare for reboot when resetting EC
This fixes an issue on systems where the S3 state in the pm1 control
registers are not cleared when vboot determines recovery mode is
required on an S3 resume. The EC code will reboot the system knowing
that the EC was in RW. However, on subsequent entry into romstage the
S3 path will be taken and fails to recover cbmem -- forcing another
reboot. To work around that, signal to the platform a reboot is
happening and let the platform perform the necessary fix ups to the
register state.
BUG=chrome-os-partner:62627
Change-Id: Ic144b11b4968c92a1273b8d9eb9dc10f0056bf3d
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/18295
Tested-by: build bot (Jenkins)
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Diffstat (limited to 'src/ec/google')
| -rw-r--r-- | src/ec/google/chromeec/ec.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/ec/google/chromeec/ec.c b/src/ec/google/chromeec/ec.c index d0648f7d1d..3c90b9229c 100644 --- a/src/ec/google/chromeec/ec.c +++ b/src/ec/google/chromeec/ec.c @@ -230,6 +230,9 @@ void google_chromeec_check_ec_image(int expected_type) cec_cmd.cmd_dev_index = 0; printk(BIOS_DEBUG, "Rebooting with EC in RO mode:\n"); post_code(0); /* clear current post code */ + /* Let the platform prepare for the EC taking out the system power. */ + if (IS_ENABLED(CONFIG_VBOOT)) + vboot_platform_prepare_reboot(); google_chromeec_command(&cec_cmd); udelay(1000); hard_reset(); |