diff options
author | Jagadish Krishnamoorthy <jagadish.krishnamoorthy@intel.com> | 2015-07-18 11:46:37 -0700 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2015-07-21 21:22:15 +0200 |
commit | f4e9eb9aba875768cbd80241e3770659bdafd643 (patch) | |
tree | 10ba2e46ff7ae7fdd15252f4326c76f13d690bdc /src/ec | |
parent | 76d16715ec067abcadecbbd79b51e2711b8ec57c (diff) | |
download | coreboot-f4e9eb9aba875768cbd80241e3770659bdafd643.tar.xz |
mec: Correct the access mode for short payloads
If the Host Command payload is less than 4 bytes
and is word aligned then the payload was not transferred at all.
EC reads the old packet and CRC mismatch occurs.
In this issue, the HC command packet
consisting of EC_CMD_REBOOT_EC as command and EC_REBOOT_COLD
as payload encountered the same problem as above.
Hence select byte access mode for shorter payloads.
BRANCH=None
BUG=chrome-os-partner:42396
TEST=System should boot after
chromeos-firmwareupdate
Change-Id: I22bdb739108d31b592c20247be69c198d617d359
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 8a43d2636b1bbfbac0384e1ea5e8853a7bd87a7f
Original-Change-Id: I5572093436f4f4a0fc337efa943753ab4642d8e4
Original-Signed-off-by: Jagadish Krishnamoorthy <jagadish.krishnamoorthy@intel.com>
Original-Signed-off-by: Icarus Sparry <icarus.w.sparry@intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/286537
Original-Reviewed-by: Shawn N <shawnn@chromium.org>
Reviewed-on: http://review.coreboot.org/11012
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/ec')
-rw-r--r-- | src/ec/google/chromeec/ec_mec.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/ec/google/chromeec/ec_mec.c b/src/ec/google/chromeec/ec_mec.c index 8a3b852593..5d1ec3c7f3 100644 --- a/src/ec/google/chromeec/ec_mec.c +++ b/src/ec/google/chromeec/ec_mec.c @@ -85,7 +85,7 @@ void mec_io_bytes(int write, u16 port, unsigned int length, u8 *buf, u8 *csum) * Long access cannot be used on misaligned data since reading B0 loads * the data register and writing B3 flushes it. */ - if (port & 0x3) + if ((port & 0x3) || (length < 4)) access_mode = ACCESS_TYPE_BYTE; else access_mode = ACCESS_TYPE_LONG_AUTO_INCREMENT; |