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authorStefan Reinauer <reinauer@chromium.org>2011-06-22 16:39:19 -0700
committerStefan Reinauer <stefan.reinauer@coreboot.org>2011-10-21 23:34:30 +0200
commitd1bc331855caab351a70676b5085787292a45fea (patch)
tree8d0ddcf777c4b7330e02495982f1f718f56d27fc /src/include/boot
parentb6010b8e70c25f93773bc464457f69fd4bb8a82e (diff)
downloadcoreboot-d1bc331855caab351a70676b5085787292a45fea.tar.xz
Extend coreboot table entry for serial ports
Add information about memory mapped/io mapped base addresses. and fix up libpayload to use the same structures Signed-off-by: Stefan Reinauer <reinauer@google.com> Change-Id: I5f7b5eda6063261b9acb7a46310172d4a5471dfb Reviewed-on: http://review.coreboot.org/261 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/include/boot')
-rw-r--r--src/include/boot/coreboot_tables.h5
1 files changed, 4 insertions, 1 deletions
diff --git a/src/include/boot/coreboot_tables.h b/src/include/boot/coreboot_tables.h
index 983b03f602..45ba3af110 100644
--- a/src/include/boot/coreboot_tables.h
+++ b/src/include/boot/coreboot_tables.h
@@ -146,7 +146,10 @@ struct lb_string {
struct lb_serial {
uint32_t tag;
uint32_t size;
- uint16_t ioport;
+#define LB_SERIAL_TYPE_IO_MAPPED 1
+#define LB_SERIAL_TYPE_MEMORY_MAPPED 2
+ uint32_t type;
+ uint32_t baseaddr;
uint32_t baud;
};