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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-04-16 09:43:40 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-04-20 20:03:55 +0200 |
| commit | a6c525a7d5ad0dedc31dcc9719be6bc5fbc743dd (patch) | |
| tree | e789fe63a0581050c35f07806d6854ed7f82d08d /src/include/cbfs.h | |
| parent | 35546deba642d3bb341d329fc1b9711727a5c50e (diff) | |
| download | coreboot-a6c525a7d5ad0dedc31dcc9719be6bc5fbc743dd.tar.xz | |
AMD AGESA cimx/sb700: Drop APIC_ID_OFFSET and MAX_PHYSICAL_CPUS
Following boards use cimx/sb700:
amd/dinar
supermicro/h8qgi
supermicro/h8scm
tyan/s8226
Only amd/dinar had APIC_ID_OFFSET defined, thus all had 0x0.
There was a nonsense preprocessor directive (MAX_CPUS * MAX_PHYSICAL_CPUS >= 1).
Except for tyan, (MAX_CPUS * MAX_PHYSICAL_CPUS) % 256 == 0.
Together with documented 4-bit restriction for APIC ID field, this APIC ID
programming matches with MP tables and ACPI tables.
I believe this would also fix cases of cimx/sb700 with MAX_CPUS<16, which
we do not have in the tree.
Change-Id: If8d65e95788ba02fc8d331a7af03a4d0d8cf5c69
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/5539
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Diffstat (limited to 'src/include/cbfs.h')
0 files changed, 0 insertions, 0 deletions