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authorElyes HAOUAS <ehaouas@noos.fr>2016-07-28 21:25:21 +0200
committerMartin Roth <martinroth@google.com>2016-07-31 18:30:16 +0200
commit918535a657b4ee393708640aa2e8ed3c75de20b9 (patch)
treeb30037239dd2f44555348c95f3cc5a287a5f1f77 /src/include/cbfs.h
parent1bcd7fcb6199528fc82685e161d6b39f273a1962 (diff)
downloadcoreboot-918535a657b4ee393708640aa2e8ed3c75de20b9.tar.xz
src/include: Capitalize CPU, RAM and ROM
Change-Id: Id40c1bf868820c77ea20146d19c6d552c2f970c4 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/15942 Tested-by: build bot (Jenkins) Reviewed-by: Omar Pakker Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/include/cbfs.h')
-rw-r--r--src/include/cbfs.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/include/cbfs.h b/src/include/cbfs.h
index 2d1921898a..6d9dd42d72 100644
--- a/src/include/cbfs.h
+++ b/src/include/cbfs.h
@@ -23,7 +23,7 @@
* Perform CBFS operations on the boot device. *
***********************************************/
-/* Return mapping of option rom found in boot device. NULL on error. */
+/* Return mapping of option ROM found in boot device. NULL on error. */
void *cbfs_boot_map_optionrom(uint16_t vendor, uint16_t device);
/* Load stage by name into memory. Returns entry address on success. NULL on
* failure. */