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authorKyösti Mälkki <kyosti.malkki@gmail.com>2020-07-09 07:13:37 +0300
committerNico Huber <nico.h@gmx.de>2020-07-11 14:48:25 +0000
commit2446c1e9e99e6448f5f62c7a4f9c50dceec2b25e (patch)
tree266234c7563d25e45b566eba394b74b14911c1ea /src/include/cbmem.h
parentbd5c721f6bd099e2fbad4dbde5e72c0b6945dad9 (diff)
downloadcoreboot-2446c1e9e99e6448f5f62c7a4f9c50dceec2b25e.tar.xz
arch/x86: Drop CBMEM_TOP_BACKUP
Code has evolved such that there seems to be little use for global definition of cbmem_top_chipset(). Even for AMD we had three different implementations. Change-Id: I44805aa49eab526b940e57bd51cd1d9ae0377b4b Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43326 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/include/cbmem.h')
-rw-r--r--src/include/cbmem.h11
1 files changed, 0 insertions, 11 deletions
diff --git a/src/include/cbmem.h b/src/include/cbmem.h
index 4cc4045055..b548cd9559 100644
--- a/src/include/cbmem.h
+++ b/src/include/cbmem.h
@@ -139,17 +139,6 @@ void cbmem_add_records_to_cbtable(struct lb_header *header);
static cbmem_init_hook_t init_fn_ ## _unused3_ = init_fn_;
#endif /* ENV_RAMSTAGE */
-
-/* Any new chipset and board must implement cbmem_top() for both
- * romstage and ramstage to support early features like COLLECT_TIMESTAMPS
- * and CBMEM_CONSOLE. Sometimes it is necessary to have cbmem_top()
- * value stored in nvram to enable early recovery on S3 path.
- */
-#if ENV_X86
-void backup_top_of_low_cacheable(uintptr_t ramtop);
-uintptr_t restore_top_of_low_cacheable(void);
-#endif
-
/*
* Returns 0 for the stages where we know that cbmem does not come online.
* Even if this function returns 1 for romstage, depending upon the point in