diff options
author | Aaron Durbin <adurbin@chromium.org> | 2013-02-11 21:15:12 -0600 |
---|---|---|
committer | Ronald G. Minnich <rminnich@gmail.com> | 2013-03-21 22:49:49 +0100 |
commit | c00457d065a0b57e8e2e8abc9318fc6e1198ee64 (patch) | |
tree | d529351f300f0af21922c72a3c7bdf6abeea713a /src/include/cbmem.h | |
parent | f2b20d898a652889a819478174316cff235a501b (diff) | |
download | coreboot-c00457d065a0b57e8e2e8abc9318fc6e1198ee64.tar.xz |
romstage_handoff: add s3_resume field
Provide a field in the romstage_handoff structure to indicate if the
current boot is an ACPI S3 wake boot. There are currently quite a few
non-standardized ways of passing this knowledge to ramstage from
romstage. Many utilize stashing magic numbers in device-specific
registers. The addition of this field adds a more formalized method
passing along this information. However, it still requires the romstage
chipset code to initialize this field. In short, this change does not
make this a hard requirement for ramstage.
Change-Id: Ia819c0ceed89ed427ef576a036fa870eb7cf57bc
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/2796
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/include/cbmem.h')
0 files changed, 0 insertions, 0 deletions