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| author | Myles Watson <mylesgw@gmail.com> | 2009-11-06 17:02:51 +0000 |
|---|---|---|
| committer | Myles Watson <mylesgw@gmail.com> | 2009-11-06 17:02:51 +0000 |
| commit | 1d6d45e3c98e16cbb86915483f771a7bf0e9a633 (patch) | |
| tree | 38eca17371ca6c9e47b0b403d016eb163327b01b /src/include/cpu/amd | |
| parent | 637309d65e6448d34cc92d44f92a93324c154e79 (diff) | |
| download | coreboot-1d6d45e3c98e16cbb86915483f771a7bf0e9a633.tar.xz | |
Split the two usages of __ROMCC__:
__ROMCC__ now means "Don't use prototypes, since romcc doesn't support them."
__PRE_RAM__ means "Use simpler versions of functions, and no device tree."
There are probably some places where both are tested, but only one is needed.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4921 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/include/cpu/amd')
| -rw-r--r-- | src/include/cpu/amd/dualcore.h | 2 | ||||
| -rw-r--r-- | src/include/cpu/amd/model_fxx_rev.h | 4 | ||||
| -rw-r--r-- | src/include/cpu/amd/mtrr.h | 2 | ||||
| -rw-r--r-- | src/include/cpu/amd/quadcore.h | 2 |
4 files changed, 5 insertions, 5 deletions
diff --git a/src/include/cpu/amd/dualcore.h b/src/include/cpu/amd/dualcore.h index fb53c92909..1d33840668 100644 --- a/src/include/cpu/amd/dualcore.h +++ b/src/include/cpu/amd/dualcore.h @@ -15,7 +15,7 @@ struct node_core_id { struct node_core_id get_node_core_id(unsigned int nb_cfg_54); #endif -#ifndef __ROMCC__ +#if !defined( __ROMCC__ ) && !defined(__PRE_RAM__) struct device; unsigned get_apicid_base(unsigned ioapic_num); void amd_sibling_init(struct device *cpu); diff --git a/src/include/cpu/amd/model_fxx_rev.h b/src/include/cpu/amd/model_fxx_rev.h index a3f3033b28..c2d59a62de 100644 --- a/src/include/cpu/amd/model_fxx_rev.h +++ b/src/include/cpu/amd/model_fxx_rev.h @@ -49,7 +49,7 @@ static inline int is_cpu_e0(void) } -#ifdef __ROMCC__ +#ifdef __PRE_RAM__ static int is_e0_later_in_bsp(int nodeid) { uint32_t val; @@ -96,7 +96,7 @@ static inline int is_cpu_pre_f2(void) return (cpuid_eax(1) & 0xfff0f) < 0x40f02; } -#ifdef __ROMCC__ +#ifdef __PRE_RAM__ //AMD_F0_SUPPORT static int is_cpu_f0_in_bsp(int nodeid) { diff --git a/src/include/cpu/amd/mtrr.h b/src/include/cpu/amd/mtrr.h index 2b7017d897..d86655dcdd 100644 --- a/src/include/cpu/amd/mtrr.h +++ b/src/include/cpu/amd/mtrr.h @@ -31,7 +31,7 @@ #define TOP_MEM_MASK 0x007fffff #define TOP_MEM_MASK_KB (TOP_MEM_MASK >> 10) -#if !defined( __ROMCC__ ) && !defined (ASSEMBLY) +#if !defined( __ROMCC__ ) && !defined (ASSEMBLY) && !defined(__PRE_RAM__) void amd_setup_mtrrs(void); #endif /* __ROMCC__ */ diff --git a/src/include/cpu/amd/quadcore.h b/src/include/cpu/amd/quadcore.h index 54a1c9be22..f7b2d09a19 100644 --- a/src/include/cpu/amd/quadcore.h +++ b/src/include/cpu/amd/quadcore.h @@ -34,7 +34,7 @@ struct node_core_id { struct node_core_id get_node_core_id(u32 nb_cfg_54); #endif -#ifndef __ROMCC__ +#if !defined( __ROMCC__ ) && !defined(__PRE_RAM__) struct device; u32 get_apicid_base(u32 ioapic_num); void amd_sibling_init(struct device *cpu); |