diff options
author | Nico Huber <nico.huber@secunet.com> | 2012-10-01 15:53:14 +0200 |
---|---|---|
committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2012-11-01 22:21:12 +0100 |
commit | 41392df0d1e22aeaa694d5e8b6f58db198da423c (patch) | |
tree | 990601d2dd38d87f43d340c8113f5acc8d53a130 /src/include/cpu/intel | |
parent | bef3d347e8a21049d72407246a5d4ec1339b5601 (diff) | |
download | coreboot-41392df0d1e22aeaa694d5e8b6f58db198da423c.tar.xz |
Merge cpu/intel/acpi.h into cpu/intel/speedstep.h
We had only some MSR definitions in there, which are used in speedstep
related code. I think speedstep.h is the better and less confusing place
for these.
Change-Id: I1eddea72c1e2d3b2f651468b08b3c6f88b713149
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1655
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/include/cpu/intel')
-rw-r--r-- | src/include/cpu/intel/acpi.h | 24 | ||||
-rw-r--r-- | src/include/cpu/intel/speedstep.h | 7 |
2 files changed, 7 insertions, 24 deletions
diff --git a/src/include/cpu/intel/acpi.h b/src/include/cpu/intel/acpi.h deleted file mode 100644 index aac45927f0..0000000000 --- a/src/include/cpu/intel/acpi.h +++ /dev/null @@ -1,24 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2010 Patrick Georgi <patrick@georgi-clan.de> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#define IA32_PLATFORM_ID 0x017 -#define IA32_PERF_STS 0x198 -#define IA32_PERF_CTL 0x199 -#define MSR_THERM2_CTL 0x19D -#define IA32_MISC_ENABLES 0x1A0 diff --git a/src/include/cpu/intel/speedstep.h b/src/include/cpu/intel/speedstep.h index 00a5b9b87d..c3cd2d2efc 100644 --- a/src/include/cpu/intel/speedstep.h +++ b/src/include/cpu/intel/speedstep.h @@ -32,3 +32,10 @@ */ #define PMB1_BASE 0x800 + +/* Speedstep related MSRs */ +#define IA32_PLATFORM_ID 0x017 +#define IA32_PERF_STS 0x198 +#define IA32_PERF_CTL 0x199 +#define MSR_THERM2_CTL 0x19D +#define IA32_MISC_ENABLES 0x1A0 |