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| author | Vadim Bendebury <vbendeb@chromium.org> | 2012-06-19 12:56:57 -0700 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2012-07-24 22:15:19 +0200 |
| commit | 537b4e09e644107ed644cd88f8a7fd488406b9a2 (patch) | |
| tree | 92b1fc622e2f89c55149064396459ac362f2be17 /src/include/cpu/intel | |
| parent | ef6b08cc486e5d97103211dfeb3d629552a92e43 (diff) | |
| download | coreboot-537b4e09e644107ed644cd88f8a7fd488406b9a2.tar.xz | |
Add code to read Intel microcode from CBFS
When CONFIG_MICROCODE_IN_CBFS is enabled, find the microcode blob in
CBFS and pass it to intel_update_microcode() instead of using the
compiled in array.
CBFS accesses in pre-RAM and 'normal' environments are provided
through different API.
Change-Id: I35c1480edf87e550a7b88c4aadf079cf3ff86b5d
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: http://review.coreboot.org/1296
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/include/cpu/intel')
| -rw-r--r-- | src/include/cpu/intel/microcode.h | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/src/include/cpu/intel/microcode.h b/src/include/cpu/intel/microcode.h index 4139c01e82..289e9196fa 100644 --- a/src/include/cpu/intel/microcode.h +++ b/src/include/cpu/intel/microcode.h @@ -1,6 +1,7 @@ /* * This file is part of the coreboot project. * + * Copyright (C) 2012 The ChromiumOS Authors. All rights reserved. * Copyright (C) 2000 Ronald G. Minnich * * This program is free software; you can redistribute it and/or modify @@ -16,7 +17,15 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +#ifndef __CPU__INTEL__MICROCODE__ +#define __CPU__INTEL__MICROCODE__ -#if !defined(__ROMCC__) +#ifndef __PRE_RAM__ +#if CONFIG_MICROCODE_IN_CBFS +void intel_update_microcode_from_cbfs(void); +#else void intel_update_microcode(const void *microcode_updates); #endif +#endif + +#endif |