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| author | Lee Leahy <leroy.p.leahy@intel.com> | 2017-03-06 18:01:04 -0800 |
|---|---|---|
| committer | Lee Leahy <leroy.p.leahy@intel.com> | 2017-03-09 17:16:09 +0100 |
| commit | 0ca2a0654ca4b403e8a54d558bce07a862820a9d (patch) | |
| tree | 86c845b441c8ae4824bf6178943148ec94441c6d /src/include/cpu/x86 | |
| parent | 75d8d8da47a3cc759d7395f5b0ef91ba13a59e51 (diff) | |
| download | coreboot-0ca2a0654ca4b403e8a54d558bce07a862820a9d.tar.xz | |
src/include: Fix unsigned warnings
Fix warning detected by checkpatch.pl:
WARNING: Prefer 'unsigned int' to bare use of 'unsigned'
BRANCH=none
BUG=None
TEST=Build and run on Galileo Gen2
Change-Id: I23d9b4b715aa74acc387db8fb8d3c73bd5cabfaa
Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Reviewed-on: https://review.coreboot.org/18607
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/include/cpu/x86')
| -rw-r--r-- | src/include/cpu/x86/msr.h | 18 | ||||
| -rw-r--r-- | src/include/cpu/x86/mtrr.h | 3 | ||||
| -rw-r--r-- | src/include/cpu/x86/tsc.h | 4 |
3 files changed, 13 insertions, 12 deletions
diff --git a/src/include/cpu/x86/msr.h b/src/include/cpu/x86/msr.h index f830f3ba3b..c663d29c36 100644 --- a/src/include/cpu/x86/msr.h +++ b/src/include/cpu/x86/msr.h @@ -19,27 +19,27 @@ static void wrmsr(unsigned long index, msr_t msr) typedef struct msr_struct { - unsigned lo; - unsigned hi; + unsigned int lo; + unsigned int hi; } msr_t; typedef struct msrinit_struct { - unsigned index; + unsigned int index; msr_t msr; } msrinit_t; #if IS_ENABLED(CONFIG_SOC_SETS_MSRS) -msr_t soc_msr_read(unsigned index); -void soc_msr_write(unsigned index, msr_t msr); +msr_t soc_msr_read(unsigned int index); +void soc_msr_write(unsigned int index, msr_t msr); /* Handle MSR references in the other source code */ -static inline __attribute__((always_inline)) msr_t rdmsr(unsigned index) +static inline __attribute__((always_inline)) msr_t rdmsr(unsigned int index) { return soc_msr_read(index); } -static inline __attribute__((always_inline)) void wrmsr(unsigned index, msr_t msr) +static inline __attribute__((always_inline)) void wrmsr(unsigned int index, msr_t msr) { soc_msr_write(index, msr); } @@ -55,7 +55,7 @@ static inline __attribute__((always_inline)) void wrmsr(unsigned index, msr_t ms * these functions to always be inlined by adding the qualifier * __attribute__((always_inline)) to their declaration. */ -static inline __attribute__((always_inline)) msr_t rdmsr(unsigned index) +static inline __attribute__((always_inline)) msr_t rdmsr(unsigned int index) { msr_t result; __asm__ __volatile__ ( @@ -66,7 +66,7 @@ static inline __attribute__((always_inline)) msr_t rdmsr(unsigned index) return result; } -static inline __attribute__((always_inline)) void wrmsr(unsigned index, msr_t msr) +static inline __attribute__((always_inline)) void wrmsr(unsigned int index, msr_t msr) { __asm__ __volatile__ ( "wrmsr" diff --git a/src/include/cpu/x86/mtrr.h b/src/include/cpu/x86/mtrr.h index d9f38f57ee..fb8474a19d 100644 --- a/src/include/cpu/x86/mtrr.h +++ b/src/include/cpu/x86/mtrr.h @@ -87,7 +87,8 @@ void mtrr_use_temp_range(uintptr_t begin, size_t size, int type); #endif #if !defined(__ASSEMBLER__) && defined(__PRE_RAM__) && !defined(__ROMCC__) -void set_var_mtrr(unsigned reg, unsigned base, unsigned size, unsigned type); +void set_var_mtrr(unsigned int reg, unsigned int base, unsigned int size, + unsigned int type); int get_free_var_mtrr(void); #endif diff --git a/src/include/cpu/x86/tsc.h b/src/include/cpu/x86/tsc.h index e4ca0e768f..5a7fbc2007 100644 --- a/src/include/cpu/x86/tsc.h +++ b/src/include/cpu/x86/tsc.h @@ -12,8 +12,8 @@ #endif struct tsc_struct { - unsigned lo; - unsigned hi; + unsigned int lo; + unsigned int hi; }; typedef struct tsc_struct tsc_t; |