diff options
| author | Stefan Reinauer <stepan@coresystems.de> | 2011-01-19 06:54:42 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2011-01-19 06:54:42 +0000 |
| commit | 7b0500c24ca103e8f8d802b476517afc2ac8eef5 (patch) | |
| tree | 9288cd7a3ea130d50e151455ea9c72bf07fd29a2 /src/include/cpu/x86 | |
| parent | 5bb9fd6e4dae32f86a07676228034d3828820037 (diff) | |
| download | coreboot-7b0500c24ca103e8f8d802b476517afc2ac8eef5.tar.xz | |
Revert r5902 to make code more readable again. At least three people like to
have this go away again.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Kevin O'Connor <kevin@koconnor.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6273 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/include/cpu/x86')
| -rw-r--r-- | src/include/cpu/x86/car.h | 75 |
1 files changed, 0 insertions, 75 deletions
diff --git a/src/include/cpu/x86/car.h b/src/include/cpu/x86/car.h deleted file mode 100644 index 45c62c6424..0000000000 --- a/src/include/cpu/x86/car.h +++ /dev/null @@ -1,75 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2000,2007 Ronald G. Minnich <rminnich@gmail.com> - * Copyright (C) 2007-2008 coresystems GmbH - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <cpu/x86/mtrr.h> - -/* Save the BIST result. */ -#define save_bist_result() \ - movl %eax, %ebp - -/* Restore the BIST result. */ -#define restore_bist_result() \ - movl %ebp, %eax - -/* Enable cache. */ -#define enable_cache() \ - movl %cr0, %eax; \ - andl $(~((1 << 30) | (1 << 29))), %eax; \ - movl %eax, %cr0 - -/* Disable cache. */ -#define disable_cache() \ - movl %cr0, %eax; \ - orl $(1 << 30), %eax; \ - movl %eax, %cr0 - -/* Enable MTRR. */ -#define enable_mtrr() \ - movl $MTRRdefType_MSR, %ecx; \ - rdmsr; \ - orl $(1 << 11), %eax; \ - wrmsr - -/* Disable MTRR. */ -#define disable_mtrr() \ - movl $MTRRdefType_MSR, %ecx; \ - rdmsr; \ - andl $(~(1 << 11)), %eax; \ - wrmsr - -/* Enable L2 cache. */ -#define enable_l2_cache() \ - movl $0x11e, %ecx; \ - rdmsr; \ - orl $(1 << 8), %eax; \ - wrmsr - -/* Enable SSE. */ -#define enable_sse() \ - movl %cr4, %eax; \ - orl $(3 << 9), %eax; \ - movl %eax, %cr4 - -/* Disable SSE. */ -#define disable_sse() \ - movl %cr4, %eax; \ - andl $~(3 << 9), %eax; \ - movl %eax, %cr4 - |