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author | Lee Leahy <leroy.p.leahy@intel.com> | 2017-03-07 15:24:16 -0800 |
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committer | Lee Leahy <leroy.p.leahy@intel.com> | 2017-03-13 17:18:37 +0100 |
commit | 6d71a43af5e18229364523bb1f8f62b30ac7cd8c (patch) | |
tree | fcae5006a4482196c1c9df8b5050adb43e2ec946 /src/include/cpu | |
parent | 35af5c47b030c0a1837cb34bc9ae4d50734fefb0 (diff) | |
download | coreboot-6d71a43af5e18229364523bb1f8f62b30ac7cd8c.tar.xz |
src/include: Fix space between type, * and variable name
Fix the following errors detected by checkpatch.pl:
ERROR: "foo * bar" should be "foo *bar"
ERROR: "foo* bar" should be "foo *bar"
ERROR: "foo*bar" should be "foo *bar"
TEST=Build and run on Galileo Gen2
Change-Id: I5a3ff8b92e3ceecb4ddf45d8840454d5310fc6b3
Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Reviewed-on: https://review.coreboot.org/18655
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/include/cpu')
-rw-r--r-- | src/include/cpu/amd/powernow.h | 2 | ||||
-rw-r--r-- | src/include/cpu/intel/romstage.h | 2 | ||||
-rw-r--r-- | src/include/cpu/x86/lapic.h | 2 |
3 files changed, 3 insertions, 3 deletions
diff --git a/src/include/cpu/amd/powernow.h b/src/include/cpu/amd/powernow.h index fc1e8635e8..63968151b0 100644 --- a/src/include/cpu/amd/powernow.h +++ b/src/include/cpu/amd/powernow.h @@ -18,6 +18,6 @@ #define POWERNOW_H void amd_generate_powernow(u32 pcontrol_blk, u8 plen, u8 onlyBSP); -void amd_powernow_update_fadt(acpi_fadt_t * fadt); +void amd_powernow_update_fadt(acpi_fadt_t *fadt); #endif diff --git a/src/include/cpu/intel/romstage.h b/src/include/cpu/intel/romstage.h index 1f967ce452..0dd02ce355 100644 --- a/src/include/cpu/intel/romstage.h +++ b/src/include/cpu/intel/romstage.h @@ -24,7 +24,7 @@ void *setup_stack_and_mtrrs(void); /* romstage_main is called from the cache-as-ram assembly file to prepare * CAR stack guards.*/ -void * asmlinkage romstage_main(unsigned long bist); +asmlinkage void *romstage_main(unsigned long bist); /* romstage_after_car() is the C function called after cache-as-ram has * been torn down. It is responsible for loading the ramstage. */ void asmlinkage romstage_after_car(void); diff --git a/src/include/cpu/x86/lapic.h b/src/include/cpu/x86/lapic.h index 3448ced2d0..540e985b0a 100644 --- a/src/include/cpu/x86/lapic.h +++ b/src/include/cpu/x86/lapic.h @@ -77,7 +77,7 @@ struct __xchg_dummy { unsigned long a[100]; }; * Note 2: xchg has side effect, so that attribute volatile is necessary, * but generally the primitive is invalid, *ptr is output argument. --ANK */ -static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size) +static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size) { switch (size) { case 1: |