diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2018-10-24 15:55:53 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-11-08 11:35:26 +0000 |
| commit | a9473ecbb142d07e95b120dbab6e9e50017f1e55 (patch) | |
| tree | eff72fa0a3176aee0b2568b627553788922c7042 /src/include/cpu | |
| parent | f33e835a064d11179c37d2c306ba024aa3a636fd (diff) | |
| download | coreboot-a9473ecbb142d07e95b120dbab6e9e50017f1e55.tar.xz | |
src: Replace common MSR addresses with macros
Change-Id: I9fba67be12483ea5e12ccd34c648735d409bc8b0
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/29252
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Diffstat (limited to 'src/include/cpu')
| -rw-r--r-- | src/include/cpu/x86/msr.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/include/cpu/x86/msr.h b/src/include/cpu/x86/msr.h index 5238b3ef7c..1dce914b6e 100644 --- a/src/include/cpu/x86/msr.h +++ b/src/include/cpu/x86/msr.h @@ -14,6 +14,7 @@ #define EFER_SCE (1 << 0) /* Page attribute type MSR */ +#define TSC_MSR 0x10 #define IA32_PLATFORM_ID 0x17 #define IA32_FEATURE_CONTROL 0x3a #define FEATURE_CONTROL_LOCK_BIT (1 << 0) |