diff options
author | efdesign98 <efdesign98@gmail.com> | 2011-06-20 19:56:06 -0700 |
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committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2011-06-28 23:09:25 +0200 |
commit | 7c0c64e1033b4edf9a488e8e31948726ee17465e (patch) | |
tree | 17d6b727807ed513c68ac00b9255577a86717b1b /src/include/cpu | |
parent | 7c634ae8c18d1e311b5b96f09b5e6af23e57eaf7 (diff) | |
download | coreboot-7c0c64e1033b4edf9a488e8e31948726ee17465e.tar.xz |
Addition of Family12/SB900 wrapper code
This change adds the wrapper code for the AMD Family12
cpus and the AMD Hudson-2 (SB900) southbridge to the cpu,
northbridge and southbridge folders respectively.
Change-Id: I22b6efe0017d0af03eaa36a1db1615e5f38da06c
Signed-off-by: Frank Vibrans <frank.vibrans@amd.com>
Signed-off-by: efdesign98 <efdesign98@gmail.com>
Reviewed-on: http://review.coreboot.org/53
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/include/cpu')
-rwxr-xr-x | src/include/cpu/amd/amdfam12.h | 53 |
1 files changed, 53 insertions, 0 deletions
diff --git a/src/include/cpu/amd/amdfam12.h b/src/include/cpu/amd/amdfam12.h new file mode 100755 index 0000000000..6c0a5ac41d --- /dev/null +++ b/src/include/cpu/amd/amdfam12.h @@ -0,0 +1,53 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2011 Advanced Micro Devices, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef CPU_AMD_FAM12_H +#define CPU_AMD_FAM12_H + +#include <cpu/x86/msr.h> + +#define HWCR_MSR 0xC0010015 +#define NB_CFG_MSR 0xC001001f +#define LS_CFG_MSR 0xC0011020 +#define IC_CFG_MSR 0xC0011021 +#define DC_CFG_MSR 0xC0011022 +#define BU_CFG_MSR 0xC0011023 +#define BU_CFG2_MSR 0xC001102A + +#define CPU_ID_FEATURES_MSR 0xC0011004 +#define CPU_ID_EXT_FEATURES_MSR 0xC0011005 + +msr_t rdmsr_amd(u32 index); +void wrmsr_amd(u32 index, msr_t msr); + +//#if defined(__GNUC__) +//// it can be used to get unitid and coreid it running only +//struct node_core_id get_node_core_id(u32 nb_cfg_54); +//struct node_core_id get_node_core_id_x(void); +//#endif + +#if defined(__PRE_RAM__) +void wait_all_core0_started(void); +void wait_all_other_cores_started(u32 bsp_apicid); +void wait_all_aps_started(u32 bsp_apicid); +void allow_all_aps_stop(u32 bsp_apicid); +#endif +u32 get_initial_apicid(void); + +#endif /* CPU_AMD_FAM12_H */ |