diff options
author | Eric Biederman <ebiederm@xmission.com> | 2004-03-11 15:01:31 +0000 |
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committer | Eric Biederman <ebiederm@xmission.com> | 2004-03-11 15:01:31 +0000 |
commit | 5cd81730ecef18690f92d193b0381c103a5b3d9b (patch) | |
tree | f4d2755177561691661f8d945081df67bcc9cd1a /src/include/cpu | |
parent | f31d5542f6e193595da0f66aea68602910984861 (diff) | |
download | coreboot-5cd81730ecef18690f92d193b0381c103a5b3d9b.tar.xz |
- Moved hlt() to it's own header.
- Reworked pnp superio device support. Now complete superio support is less than 100 lines.
- Added support for hard coding resource assignments in Config.lb
- Minor bug fixes to romcc
- Initial support for catching the x86 processor BIST error codes. I've only seen
this trigger once in production during a very suspcious reset but...
- added raminit_test to test the code paths in raminit.c for the Opteron
- Removed the IORESOURCE_SET bit and added IORESOURCE_ASSIGNED and IORESOURCE_STORED
so we can tell what we have really done.
- Added generic AGP/IOMMU setting code to x86
- Added an implementation of memmove and removed reserved identifiers from memcpy
- Added minimal support for booting on pre b3 stepping K8 cores
- Moved the checksum on amd8111 boards because our default location was on top of
extended RTC registers
- On the Hdama added support for enabling i2c hub so we can get at the temperature
sensors. Not that i2c bus was implemented well enough to make that useful.
- Redid the Opteron port so we should only need one reset and most of memory initialization
is done in cpu_fixup. This is much, much faster.
- Attempted to make the VGA IO region assigment work. The code seems to work now...
- Redid the error handling in amdk8/raminit.c to distinguish between a bad value
and a smbus error, and moved memory clearing out to cpufixup.
- Removed CONFIG_KEYBOARD as it was useless. See pc87360/superio.c for how to
setup a legacy keyboard properly.
- Reworked the register values for standard hardware, moving the defintions from
chip.h into the headers of the initialization routines. This is much saner
and is actually implemented.
- Made the hdama port an under clockers BIOS. I debuged so many interesting problems.
- On amd8111_lpc added setup of architectural/legacy hardware
- Enabled PCI error reporting as much as possible.
- Enhanded build_opt_tbl to generate a header of the cmos option locations so
that romcc compiled code can query the cmos options.
- In romcc gracefully handle function names that degenerate into function pointers
- Bumped the version to 1.1.6 as we are getting closer to 2.0
TODO finish optimizing the HT links of non dual boards
TODO make all Opteron board work again
TODO convert all superio devices to use the new helpers
TODO convert the via/epia to freebios2 conventions
TODO cpu fixup/setup by cpu type
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1390 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/include/cpu')
-rw-r--r-- | src/include/cpu/k8/mtrr.h | 3 | ||||
-rw-r--r-- | src/include/cpu/p6/mtrr.h | 2 | ||||
-rw-r--r-- | src/include/cpu/p6/pgtbl.h | 7 |
3 files changed, 11 insertions, 1 deletions
diff --git a/src/include/cpu/k8/mtrr.h b/src/include/cpu/k8/mtrr.h index 5a965eebb8..890820b12f 100644 --- a/src/include/cpu/k8/mtrr.h +++ b/src/include/cpu/k8/mtrr.h @@ -35,4 +35,7 @@ #define DC_CFG_MSR 0xC0011022 #define BU_CFG_MSR 0xC0011023 +#define TOP_MEM_MASK 0x007fffff +#define TOP_MEM_MASK_KB (TOP_MEM_MASK >> 10) + #endif /* CPU_K8_MTRR_H */ diff --git a/src/include/cpu/p6/mtrr.h b/src/include/cpu/p6/mtrr.h index 16af10b81b..92bf62e5c2 100644 --- a/src/include/cpu/p6/mtrr.h +++ b/src/include/cpu/p6/mtrr.h @@ -2,7 +2,7 @@ #define __LINUXBIOS_CPU_P6_MTRR_H /* These are the region types */ -#define MTRR_TYPE_UNCACHABLE 0 +#define MTRR_TYPE_UNCACHEABLE 0 #define MTRR_TYPE_WRCOMB 1 /*#define MTRR_TYPE_ 2*/ /*#define MTRR_TYPE_ 3*/ diff --git a/src/include/cpu/p6/pgtbl.h b/src/include/cpu/p6/pgtbl.h new file mode 100644 index 0000000000..68e327cd7a --- /dev/null +++ b/src/include/cpu/p6/pgtbl.h @@ -0,0 +1,7 @@ +#ifndef CPU_P6_PGTBL_H +#define CPU_P6_PGTBL_H + +#define MAPPING_ERROR ((void *)0xffffffffUL) +void *map_2M_page(int cpu_index, unsigned long page); + +#endif /* CPU_P6_PGTBL_H */ |