- Major cleanup of the bootpath

- Changes to allow more code to be compiled both ways
- Working SMP support


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@987 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

2 files changed, 127 insertions, 45 deletions

diff --git a/src/include/cpu/p6/apic.h b/src/include/cpu/p6/apic.h
index 65a14603f5..7e8b2f4938 100644
--- a/src/include/cpu/p6/apic.h
+++ b/src/include/cpu/p6/apic.h
@@ -76,12 +76,40 @@
 #define			APIC_MODE_EXINT		0x7
 #define APIC_LVT1	0x360
 #define APIC_LVTERR	0x370
+#define	APIC_TMICT	0x380
+#define	APIC_TMCCT	0x390
+#define	APIC_TDCR	0x3E0
+#define		APIC_TDR_DIV_TMBASE	(1<<2)
+#define		APIC_TDR_DIV_1		0xB
+#define		APIC_TDR_DIV_2		0x0
+#define		APIC_TDR_DIV_4		0x1
+#define		APIC_TDR_DIV_8		0x2
+#define		APIC_TDR_DIV_16		0x3
+#define		APIC_TDR_DIV_32		0x8
+#define		APIC_TDR_DIV_64		0x9
+#define		APIC_TDR_DIV_128	0xA
+
+#if defined(__ROMCC__) || !defined(ASSEMBLY)
 
+static inline unsigned long apic_read(unsigned long reg)
+{
+	return *((volatile unsigned long *)(APIC_DEFAULT_BASE+reg));
+}
 
-#if !defined(ASSEMBLY)
+static inline void apic_write(unsigned long reg, unsigned long v)
+{
+	*((volatile unsigned long *)(APIC_DEFAULT_BASE+reg)) = v;
+}
+
+static inline void apic_wait_icr_idle(void)
+{
+	do { } while ( apic_read( APIC_ICR ) & APIC_ICR_BUSY );
+}
 
-#include <console/console.h>
 
+#endif
+
+#if !defined(ASSEMBLY)
 
 #define xchg(ptr,v) ((__typeof__(*(ptr)))__xchg((unsigned long)(v),(ptr),sizeof(*(ptr))))
 
@@ -119,25 +147,11 @@ static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int siz
 }
 
 
-static inline unsigned long apic_read(unsigned long reg)
-{
-	return *((volatile unsigned long *)(APIC_DEFAULT_BASE+reg));
-}
-
 extern inline void apic_write_atomic(unsigned long reg, unsigned long v)
 {
 	xchg((volatile unsigned long *)(APIC_DEFAULT_BASE+reg), v);
 }
 
-static inline void apic_write(unsigned long reg, unsigned long v)
-{
-	*((volatile unsigned long *)(APIC_DEFAULT_BASE+reg)) = v;
-}
-
-static inline void apic_wait_icr_idle(void)
-{
-	do { } while ( apic_read( APIC_ICR ) & APIC_ICR_BUSY );
-}
 
 #ifdef CONFIG_X86_GOOD_APIC
 # define FORCE_READ_AROUND_WRITE 0
diff --git a/src/include/cpu/p6/msr.h b/src/include/cpu/p6/msr.h
index 4977b0201d..d7632ba6de 100644
--- a/src/include/cpu/p6/msr.h
+++ b/src/include/cpu/p6/msr.h
@@ -1,33 +1,101 @@
 #ifndef CPU_P6_MSR_H
 #define CPU_P6_MSR_H
 
-/*
- * Access to machine-specific registers (available on 586 and better only)
- * Note: the rd* operations modify the parameters directly (without using
- * pointer indirection), this allows gcc to optimize better
- */
-
-#define rdmsr(msr,val1,val2) \
-       __asm__ __volatile__("rdmsr" \
-			    : "=a" (val1), "=d" (val2) \
-			    : "c" (msr))
-
-#define wrmsr(msr,val1,val2) \
-     __asm__ __volatile__("wrmsr" \
-			  : /* no outputs */ \
-			  : "c" (msr), "a" (val1), "d" (val2))
-
-#define rdtsc(low,high) \
-     __asm__ __volatile__("rdtsc" : "=a" (low), "=d" (high))
-
-#define rdtscl(low) \
-     __asm__ __volatile__ ("rdtsc" : "=a" (low) : : "edx")
-
-#define rdtscll(val) \
-     __asm__ __volatile__ ("rdtsc" : "=A" (val))
-
-#define rdpmc(counter,low,high) \
-     __asm__ __volatile__("rdpmc" \
-			  : "=a" (low), "=d" (high) \
-			  : "c" (counter))
+
+#ifdef __ROMCC__
+
+typedef __builtin_msr_t msr_t;
+
+static msr_t rdmsr(unsigned long index)
+{
+	return __builtin_rdmsr(index);
+}
+
+static void wrmsr(unsigned long index, msr_t msr)
+{
+	__builtin_wrmsr(index, msr.lo, msr.hi);
+}
+
+
+struct tsc_struct {
+	unsigned lo;
+	unsigned hi;
+};
+typedef struct tsc_struct tsc_t;
+
+static tsc_t rdtsc(void)
+{
+	tsc_t res;
+	asm ("rdtsc"
+		: "=a" (res.lo), "=d"(res.hi) /* outputs */
+		: /* inputs */
+		: /* Clobbers */
+		);
+	return res;
+}
+#endif
+
+#ifdef __GNUC__
+
+typedef struct msr_struct 
+{
+	unsigned lo;
+	unsigned hi;
+} msr_t;
+
+static inline msr_t rdmsr(unsigned index)
+{
+	msr_t result;
+	__asm__ __volatile__ (
+		"rdmsr"
+		: "=a" (result.lo), "=d" (result.hi)
+		: "c" (index)
+		);
+	return result;
+}
+
+static inline void wrmsr(unsigned index, msr_t msr)
+{
+	__asm__ __volatile__ (
+		"wrmsr"
+		: /* No outputs */
+		: "c" (index), "a" (msr.lo), "d" (msr.hi)
+		);
+}
+
+typedef struct tsc_struct 
+{
+	unsigned lo;
+	unsigned hi;
+} tsc_t;
+
+static inline tsc_t rdtsc(void)
+{
+	tsc_t result;
+	__asm__ __volatile__(
+		"rdtsc"
+		: "=a"  (result.lo), "=d" (result.hi)
+		);
+	return result;
+}
+
+typedef struct pmc_struct 
+{
+	unsigned lo;
+	unsigned hi;
+} pmc_t; 
+
+static inline pmc_t rdpmc(unsigned counter)
+{
+	pmc_t result;
+	__asm__ __volatile__(
+		"rdpmc"
+		: "=a" (result.lo), "=d" (result.hi)
+		: "c" (counter)
+		);
+	return result;
+}
+
+#endif
+
 #endif /* CPU_P6_MSR_H */