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| author | David Hendricks <dhendrix@chromium.org> | 2013-03-28 18:37:29 -0700 |
|---|---|---|
| committer | David Hendricks <dhendrix@chromium.org> | 2013-03-29 18:20:41 +0100 |
| commit | 7762091fcb91710615f20229d43fc7fc7246ccdb (patch) | |
| tree | cbd722b35798ce58e3f7e8c24f3c3bf87fcb73bd /src/include/cpu | |
| parent | d4d6a407f74e241c0d00c2eeac2fb85e7f08f989 (diff) | |
| download | coreboot-7762091fcb91710615f20229d43fc7fc7246ccdb.tar.xz | |
armv7: set cache level explicitly for dcache/unified cache case
This adds a missing CSSELR write in the case of a dcache or unified
cache being invalidated by armv7_invalidate_caches(), ensuring that
all levels of dcache/unified cache are invalidated as expected when
the function is called.
Change-Id: Ie90184bf8a8181afa3afe0786897455b30b7f022
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/2947
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/include/cpu')
0 files changed, 0 insertions, 0 deletions