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authorMarshall Dawson <marshalldawson3rd@gmail.com>2019-07-01 09:56:12 -0500
committerMarshall Dawson <marshalldawson3rd@gmail.com>2019-07-02 18:38:56 +0000
commit914e6b44bb189123cbc5555368d384c7ebf0e00c (patch)
tree842f3b76749fdb5c34eed4ba9a6203031c84604b /src/include/cpu
parentbf2c693f893ab6f9458f1a4840c2a9cbbd4bb9f2 (diff)
downloadcoreboot-914e6b44bb189123cbc5555368d384c7ebf0e00c.tar.xz
cpu/amd/msr: Clarify MMIO_CONF shift value
MMIO_BUS_RANGE_SHIFT is a numerical value and not a bit field. Change it to simply 2. Otherwise its usage winds up evaluating to BusRange << (1 << 1). Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Change-Id: I2a6ecfc9fbfd45f69194b8daef43ff84a1dfd5fc Reviewed-on: https://review.coreboot.org/c/coreboot/+/33942 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Diffstat (limited to 'src/include/cpu')
-rw-r--r--src/include/cpu/amd/msr.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/include/cpu/amd/msr.h b/src/include/cpu/amd/msr.h
index 5d7b5e4fda..0f88e516d1 100644
--- a/src/include/cpu/amd/msr.h
+++ b/src/include/cpu/amd/msr.h
@@ -39,7 +39,7 @@
#define MSR_INTPEND 0xC0010055
#define MMIO_CONF_BASE 0xC0010058
#define MMIO_RANGE_EN (1 << 0)
-#define MMIO_BUS_RANGE_SHIFT (1 << 1)
+#define MMIO_BUS_RANGE_SHIFT 2
/* P-state Current Limit Register */
#define PS_LIM_REG 0xC0010061
/* P-state Maximum Value shift position */