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| author | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2013-05-07 20:35:29 +0200 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2013-05-10 00:06:46 +0200 |
| commit | 3f5f6d8368031710d4f5847ff285812fcde54009 (patch) | |
| tree | 5031f39d3a5d9e21dc3bc31b56074bbceba4d344 /src/include/cpu | |
| parent | d654f42e271b2daa17a4daddcb7c9603aa25e018 (diff) | |
| download | coreboot-3f5f6d8368031710d4f5847ff285812fcde54009.tar.xz | |
Drop prototype guarding for romcc
Commit "romcc: Don't fail on function prototypes" (11a7db3b) [1]
made romcc not choke on function prototypes anymore. This
allows us to get rid of a lot of ifdefs guarding __ROMCC__ .
[1] http://review.coreboot.org/2424
Change-Id: Ib1be3b294e5b49f5101f2e02ee1473809109c8ac
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/3216
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/include/cpu')
| -rw-r--r-- | src/include/cpu/amd/gx2def.h | 2 | ||||
| -rw-r--r-- | src/include/cpu/amd/lxdef.h | 2 | ||||
| -rw-r--r-- | src/include/cpu/intel/speedstep.h | 2 | ||||
| -rw-r--r-- | src/include/cpu/x86/lapic.h | 2 |
4 files changed, 2 insertions, 6 deletions
diff --git a/src/include/cpu/amd/gx2def.h b/src/include/cpu/amd/gx2def.h index c0467beccb..ee55c2f85e 100644 --- a/src/include/cpu/amd/gx2def.h +++ b/src/include/cpu/amd/gx2def.h @@ -511,7 +511,7 @@ #define PMLogic_BASE (0x9D00) -#if !defined(__ROMCC__) && !defined(__ASSEMBLER__) +#if !defined(__ASSEMBLER__) #if defined(__PRE_RAM__) void cpuRegInit(void); void SystemPreInit(void); diff --git a/src/include/cpu/amd/lxdef.h b/src/include/cpu/amd/lxdef.h index 632bfe2217..4eee1568fb 100644 --- a/src/include/cpu/amd/lxdef.h +++ b/src/include/cpu/amd/lxdef.h @@ -630,7 +630,7 @@ #define DELAY_UPPER_DISABLE_CLK135 (1 << 23) #define DELAY_LOWER_STATUS_MASK 0x7C0 -#if !defined(__ROMCC__) && !defined(__ASSEMBLER__) +#if !defined(__ASSEMBLER__) #if defined(__PRE_RAM__) void cpuRegInit(int debug_clock_disable, u8 dimm0, u8 dimm1, int terminated); void SystemPreInit(void); diff --git a/src/include/cpu/intel/speedstep.h b/src/include/cpu/intel/speedstep.h index f4c4d7283b..8bfae60c1f 100644 --- a/src/include/cpu/intel/speedstep.h +++ b/src/include/cpu/intel/speedstep.h @@ -105,9 +105,7 @@ typedef struct { int num_states; } sst_table_t; -#ifndef __ROMCC__ void speedstep_gen_pstates(sst_table_t *); -#endif #define SPEEDSTEP_MAX_POWER_YONAH 31000 #define SPEEDSTEP_MIN_POWER_YONAH 13100 diff --git a/src/include/cpu/x86/lapic.h b/src/include/cpu/x86/lapic.h index 54b2f5488f..d4f323208b 100644 --- a/src/include/cpu/x86/lapic.h +++ b/src/include/cpu/x86/lapic.h @@ -51,7 +51,6 @@ static inline __attribute__((always_inline)) unsigned long lapicid(void) return lapic_read(LAPIC_ID) >> 24; } -#ifndef __ROMCC__ #if !CONFIG_AP_IN_SIPI_WAIT /* If we need to go back to sipi wait, we use the long non-inlined version of * this function in lapic_cpu_init.c @@ -155,6 +154,5 @@ int start_cpu(struct device *cpu); #endif /* !__PRE_RAM__ */ int boot_cpu(void); -#endif #endif /* CPU_X86_LAPIC_H */ |