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authorWarren Turkal <wt@penguintechs.org>2010-10-12 06:13:40 +0000
committerWarren Turkal <wt@penguintechs.org>2010-10-12 06:13:40 +0000
commit4ffde94c4ec51cdb24103ec13653e6f40513e1bb (patch)
tree7b0205166a4436573a4e1b23d4a16b5c14be91c0 /src/include/cpu
parent9c814d2e9ee203a2e4f8c27cb023be8c26380e7b (diff)
downloadcoreboot-4ffde94c4ec51cdb24103ec13653e6f40513e1bb.tar.xz
Reduce duplicate definition in CAR code.
Macros for the register addresses for the MTRR MSRs are already defined in include/cpu/x86/car.h. This patch uses those macros instead of creating a second instance of that same data. I also added a few macros to the amd mtrr.h to make the MSR naming more consistent. Signed-off-by: Warren Turkal <wt@penguintechs.org> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5942 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/include/cpu')
-rw-r--r--src/include/cpu/amd/mtrr.h13
1 files changed, 7 insertions, 6 deletions
diff --git a/src/include/cpu/amd/mtrr.h b/src/include/cpu/amd/mtrr.h
index c7b3fcae7d..e866fb9511 100644
--- a/src/include/cpu/amd/mtrr.h
+++ b/src/include/cpu/amd/mtrr.h
@@ -21,12 +21,13 @@
#define SYSCFG_MSR_SysVicLimitMask ((1 << 8) - (1 << 5))
#define SYSCFG_MSR_SysAckLimitMask ((1 << 5) - (1 << 0))
-#define IORR0_BASE 0xC0010016
-#define IORR0_MASK 0xC0010017
-#define IORR1_BASE 0xC0010018
-#define IORR1_MASK 0xC0010019
-#define TOP_MEM 0xC001001A
-#define TOP_MEM2 0xC001001D
+#define IORRBase_MSR(reg) (0xC0010016 + 2 * (reg))
+#define IORRMask_MSR(reg) (0xC0010016 + 2 * (reg) + 1)
+
+#define TOP_MEM_MSR 0xC001001A
+#define TOP_MEM2_MSR 0xC001001D
+#define TOP_MEM TOP_MEM_MSR
+#define TOP_MEM2 TOP_MEM2_MSR
#define TOP_MEM_MASK 0x007fffff
#define TOP_MEM_MASK_KB (TOP_MEM_MASK >> 10)