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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2020-06-10 10:52:24 +0300 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2020-06-16 08:03:27 +0000 |
commit | 21ba5eea89be9ee5019b3651814dfe148f16bc81 (patch) | |
tree | 64fa6b00f22142be6bfdf996a00099d1d6fb059d /src/include/cpu | |
parent | ad882c3b171ccd71d84ddc971ab0c4ae563190de (diff) | |
download | coreboot-21ba5eea89be9ee5019b3651814dfe148f16bc81.tar.xz |
arch/x86: Declare global_smi_enable()
The call made at mp_ops.post_mp_init() generally
uses four different names. Unify these with followups.
smm_southbridge_enable(SMI_EVENTS)
smm_southbridge_enable_smi()
hudson_enable_smi_generation()
enable_smi_generation()
Furthermore, some platforms do not enable power button
SMI early. It may be preferred to delay the enablement,
but fow now provide global_smi_enable_no_pwrbtn() too.
Change-Id: I6a28883ff9c563289b0e8199cd2ceb9acd6bacda
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42355
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/include/cpu')
-rw-r--r-- | src/include/cpu/x86/smm.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/include/cpu/x86/smm.h b/src/include/cpu/x86/smm.h index 67f958b8af..75c19a5cd5 100644 --- a/src/include/cpu/x86/smm.h +++ b/src/include/cpu/x86/smm.h @@ -38,6 +38,9 @@ int mainboard_io_trap_handler(int smif); void southbridge_smi_set_eos(void); +void global_smi_enable(void); +void global_smi_enable_no_pwrbtn(void); + void cpu_smi_handler(void); void northbridge_smi_handler(void); void southbridge_smi_handler(void); |