summaryrefslogtreecommitdiff
path: root/src/include/cpu
diff options
context:
space:
mode:
authorMartin Roth <martinroth@google.com>2017-06-24 14:13:53 -0600
committerMartin Roth <martinroth@google.com>2017-07-13 23:55:05 +0000
commit9634547eae10dc6b30014208124d54a6ddc7f987 (patch)
treea3d89a1c651cd743858b39e3220446d0450ab6d2 /src/include/cpu
parent1858d6a90a81aac67cde90190d8a332b2e817c9d (diff)
downloadcoreboot-9634547eae10dc6b30014208124d54a6ddc7f987.tar.xz
src/include: add IS_ENABLED() around Kconfig symbol references
Change-Id: I2fbe6376a1cf98d328464556917638a5679641d2 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/20354 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/include/cpu')
-rw-r--r--src/include/cpu/amd/car.h3
-rw-r--r--src/include/cpu/x86/lapic.h6
-rw-r--r--src/include/cpu/x86/post_code.h2
-rw-r--r--src/include/cpu/x86/smm.h4
-rw-r--r--src/include/cpu/x86/tsc.h4
5 files changed, 10 insertions, 9 deletions
diff --git a/src/include/cpu/amd/car.h b/src/include/cpu/amd/car.h
index 89f29c2486..e0a78544b6 100644
--- a/src/include/cpu/amd/car.h
+++ b/src/include/cpu/amd/car.h
@@ -10,7 +10,8 @@ void post_cache_as_ram(void);
void cache_as_ram_switch_stack(void *stacktop);
void cache_as_ram_new_stack(void);
-#if CONFIG_CPU_AMD_AGESA || CONFIG_CPU_AMD_PI || CONFIG_SOC_AMD_PI
+#if IS_ENABLED(CONFIG_CPU_AMD_AGESA) || IS_ENABLED(CONFIG_CPU_AMD_PI) || \
+ IS_ENABLED(CONFIG_SOC_AMD_PI)
void disable_cache_as_ram(void);
#endif
diff --git a/src/include/cpu/x86/lapic.h b/src/include/cpu/x86/lapic.h
index 6f3cbdb2c1..e781b5a5bb 100644
--- a/src/include/cpu/x86/lapic.h
+++ b/src/include/cpu/x86/lapic.h
@@ -7,7 +7,7 @@
#include <smp/node.h>
/* See if I need to initialize the local APIC */
-#if CONFIG_SMP || CONFIG_IOAPIC
+#if IS_ENABLED(CONFIG_SMP) || IS_ENABLED(CONFIG_IOAPIC)
# define NEED_LAPIC 1
#else
# define NEED_LAPIC 0
@@ -54,7 +54,7 @@ static inline __attribute__((always_inline)) unsigned long lapicid(void)
return lapic_read(LAPIC_ID) >> 24;
}
-#if !CONFIG_AP_IN_SIPI_WAIT
+#if !IS_ENABLED(CONFIG_AP_IN_SIPI_WAIT)
/* If we need to go back to sipi wait, we use the long non-inlined version of
* this function in lapic_cpu_init.c
*/
@@ -149,7 +149,7 @@ static inline int lapic_remote_read(int apicid, int reg, unsigned long *pvalue)
void setup_lapic(void);
-#if CONFIG_SMP
+#if IS_ENABLED(CONFIG_SMP)
struct device;
int start_cpu(struct device *cpu);
#endif /* CONFIG_SMP */
diff --git a/src/include/cpu/x86/post_code.h b/src/include/cpu/x86/post_code.h
index 6acfe106e3..cd3d1599ed 100644
--- a/src/include/cpu/x86/post_code.h
+++ b/src/include/cpu/x86/post_code.h
@@ -2,7 +2,7 @@
#include <console/post_codes.h>
-#if CONFIG_POST_IO
+#if IS_ENABLED(CONFIG_POST_IO)
#define post_code(value) \
movb $value, %al; \
outb %al, $CONFIG_POST_IO_PORT
diff --git a/src/include/cpu/x86/smm.h b/src/include/cpu/x86/smm.h
index 34e3d05f2c..bd0e356a3c 100644
--- a/src/include/cpu/x86/smm.h
+++ b/src/include/cpu/x86/smm.h
@@ -479,7 +479,7 @@ int mainboard_io_trap_handler(int smif);
void southbridge_smi_set_eos(void);
-#if CONFIG_SMM_TSEG
+#if IS_ENABLED(CONFIG_SMM_TSEG)
void cpu_smi_handler(void);
void northbridge_smi_handler(void);
void southbridge_smi_handler(void);
@@ -494,7 +494,7 @@ void mainboard_smi_gpi(u32 gpi_sts);
int mainboard_smi_apmc(u8 data);
void mainboard_smi_sleep(u8 slp_typ);
-#if !CONFIG_SMM_TSEG
+#if !IS_ENABLED(CONFIG_SMM_TSEG)
void smi_release_lock(void);
#endif
diff --git a/src/include/cpu/x86/tsc.h b/src/include/cpu/x86/tsc.h
index 5a7fbc2007..4cf4fbc5b0 100644
--- a/src/include/cpu/x86/tsc.h
+++ b/src/include/cpu/x86/tsc.h
@@ -3,9 +3,9 @@
#include <stdint.h>
-#if CONFIG_TSC_SYNC_MFENCE
+#if IS_ENABLED(CONFIG_TSC_SYNC_MFENCE)
#define TSC_SYNC "mfence\n"
-#elif CONFIG_TSC_SYNC_LFENCE
+#elif IS_ENABLED(CONFIG_TSC_SYNC_LFENCE)
#define TSC_SYNC "lfence\n"
#else
#define TSC_SYNC