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| author | Patrick Georgi <patrick@georgi-clan.de> | 2012-03-31 12:52:21 +0200 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2012-04-25 16:27:07 +0200 |
| commit | 05e740fc40e409dcf8d592f4bbeaf87dc92140c5 (patch) | |
| tree | 5b05e1ea6cd2a9c82ac218984e8ee5526c9b77c5 /src/include/cpu | |
| parent | 8919729307028746cf7bc527ca511183fe3b401b (diff) | |
| download | coreboot-05e740fc40e409dcf8d592f4bbeaf87dc92140c5.tar.xz | |
Replace cache control magic numbers with symbols
Instead of opaque numbers like (1<<29), use
symbols like CR0_NoWriteThrough.
Change-Id: Id845e087fb472cfaf5f71beaf37fbf0d407880b5
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/833
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/include/cpu')
| -rw-r--r-- | src/include/cpu/x86/cache.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/include/cpu/x86/cache.h b/src/include/cpu/x86/cache.h index c2de073a52..a448228776 100644 --- a/src/include/cpu/x86/cache.h +++ b/src/include/cpu/x86/cache.h @@ -20,6 +20,11 @@ #ifndef CPU_X86_CACHE #define CPU_X86_CACHE +#define CR0_CacheDisable (1 << 30) +#define CR0_NoWriteThrough (1 << 29) + +#if !defined(__ASSEMBLER__) + /* * Need two versions because ROMCC chokes on certain clobbers: * cache.h:29.71: cache.h:60.24: earlymtrr.c:117.23: romstage.c:144.33: @@ -107,4 +112,5 @@ static inline __attribute__((always_inline)) void disable_cache(void) void x86_enable_cache(void); #endif +#endif /* !__ASSEMBLER__ */ #endif /* CPU_X86_CACHE */ |