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| author | Frans Hendriks <fhendriks@eltan.com> | 2018-10-30 15:07:39 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-02-28 17:09:29 +0000 |
| commit | c6d672fe1dbfe9c07cea0c84aa2f512297e690ed (patch) | |
| tree | f18004cebf160859ee693df8a0b302a84c23401e /src/include/device/cardbus.h | |
| parent | fa011db6f0ede9073c993aff0be88ec2353cf926 (diff) | |
| download | coreboot-c6d672fe1dbfe9c07cea0c84aa2f512297e690ed.tar.xz | |
src/soc/intel/braswell/northcluster.c: Correct calculation of FSP memory area
Calculation of memory reserved by FSP is incorrect.
Use CBMEM_ID_FSP_RESERVED_MEMORY to determine the memory area
BUG=N/A
TEST=Intel CherryHill CRB
Change-Id: If68bda39ba2b1f3be4ed4bc872710be7bbd4948b
Signed-off-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-on: https://review.coreboot.org/c/29333
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Diffstat (limited to 'src/include/device/cardbus.h')
0 files changed, 0 insertions, 0 deletions