summaryrefslogtreecommitdiff
path: root/src/include/device/dram/ddr2.h
diff options
context:
space:
mode:
authorArthur Heymans <arthur@aheymans.xyz>2018-01-22 01:26:53 +0100
committerPatrick Georgi <pgeorgi@google.com>2018-04-09 09:31:11 +0000
commit97b337b252fe67f8ffb7a98f70f08835513920ba (patch)
tree393392768e234b0b99c0b909e5ce1502a64c2b10 /src/include/device/dram/ddr2.h
parentf7dc972fde66d93143c3f6927087c13ae74a4828 (diff)
downloadcoreboot-97b337b252fe67f8ffb7a98f70f08835513920ba.tar.xz
device/dram/ddr2.c: Add methods to compute to identify dram
DDR2 DIMMs are uniquely defined by SPD byte 64 till 72 and 93 till 98. Compute a crc16 over that data to provide a solid way to check DIMM identify. Reuse the crc16 function from ddr3.c to do this. Change-Id: I3c0c42786197f9b4eb3e42261c10ff5e4266120f Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/23345 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/include/device/dram/ddr2.h')
-rw-r--r--src/include/device/dram/ddr2.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/include/device/dram/ddr2.h b/src/include/device/dram/ddr2.h
index 4aad1bcd8f..9bbbfe9652 100644
--- a/src/include/device/dram/ddr2.h
+++ b/src/include/device/dram/ddr2.h
@@ -179,5 +179,6 @@ int spd_decode_ddr2(struct dimm_attr_ddr2_st *dimm, u8 spd[SPD_SIZE_MAX_DDR2]);
void dram_print_spd_ddr2(const struct dimm_attr_ddr2_st *dimm);
void normalize_tck(u32 *tclk);
u8 spd_get_msbs(u8 c);
+u16 spd_ddr2_calc_unique_crc(const u8 *spd, int len);
#endif /* DEVICE_DRAM_DDR2L_H */