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authorArthur Heymans <arthur@aheymans.xyz>2019-11-28 16:05:08 +0100
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-12-19 03:25:05 +0000
commit1cb9cd5798966bf026e5f1ef3abf7642fa1bc41b (patch)
tree096daea96736744fef239ec85a766777647119d8 /src/include/device/mmio.h
parent4f66cb9b2867bcdeb47df9fe76e8893d53f85fb8 (diff)
downloadcoreboot-1cb9cd5798966bf026e5f1ef3abf7642fa1bc41b.tar.xz
Drop ROMCC code and header guards
Change-Id: I730f80afd8aad250f26534435aec24bea75a849c Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37334 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Diffstat (limited to 'src/include/device/mmio.h')
-rw-r--r--src/include/device/mmio.h3
1 files changed, 0 insertions, 3 deletions
diff --git a/src/include/device/mmio.h b/src/include/device/mmio.h
index 4007cff7c3..524284a077 100644
--- a/src/include/device/mmio.h
+++ b/src/include/device/mmio.h
@@ -37,7 +37,6 @@
#define clrbits32(addr, clear) clrsetbits32(addr, clear, 0)
#define clrbits64(addr, clear) clrsetbits64(addr, clear, 0)
-#ifndef __ROMCC__
/*
* Reads a transfer buffer from 32-bit FIFO registers. fifo_stride is the
* distance in bytes between registers (e.g. pass 4 for a normal array of 32-bit
@@ -195,6 +194,4 @@ static inline void buffer_to_fifo32(void *buffer, size_t size, void *fifo,
#define READ32_BITFIELD(addr, name) \
EXTRACT_BITFIELD(read32(addr), name)
-#endif /* !__ROMCC__ */
-
#endif /* __DEVICE_MMIO_H__ */