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| author | Lee Leahy <leroy.p.leahy@intel.com> | 2017-03-06 18:01:04 -0800 |
|---|---|---|
| committer | Lee Leahy <leroy.p.leahy@intel.com> | 2017-03-09 17:16:09 +0100 |
| commit | 0ca2a0654ca4b403e8a54d558bce07a862820a9d (patch) | |
| tree | 86c845b441c8ae4824bf6178943148ec94441c6d /src/include/device/pci_ehci.h | |
| parent | 75d8d8da47a3cc759d7395f5b0ef91ba13a59e51 (diff) | |
| download | coreboot-0ca2a0654ca4b403e8a54d558bce07a862820a9d.tar.xz | |
src/include: Fix unsigned warnings
Fix warning detected by checkpatch.pl:
WARNING: Prefer 'unsigned int' to bare use of 'unsigned'
BRANCH=none
BUG=None
TEST=Build and run on Galileo Gen2
Change-Id: I23d9b4b715aa74acc387db8fb8d3c73bd5cabfaa
Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Reviewed-on: https://review.coreboot.org/18607
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/include/device/pci_ehci.h')
| -rw-r--r-- | src/include/device/pci_ehci.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/include/device/pci_ehci.h b/src/include/device/pci_ehci.h index e80cf2bbab..42e1d8365f 100644 --- a/src/include/device/pci_ehci.h +++ b/src/include/device/pci_ehci.h @@ -23,7 +23,7 @@ #define EHCI_BAR_INDEX 0x10 #define PCI_EHCI_CLASSCODE 0x0c0320 /* USB2.0 with EHCI controller */ -pci_devfn_t pci_ehci_dbg_dev(unsigned hcd_idx); +pci_devfn_t pci_ehci_dbg_dev(unsigned int hcd_idx); u8 *pci_ehci_base_regs(pci_devfn_t dev); void pci_ehci_dbg_set_port(pci_devfn_t dev, unsigned int port); void pci_ehci_dbg_enable(pci_devfn_t dev, unsigned long base); |