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author | Mario Scheithauer <mario.scheithauer@siemens.com> | 2018-08-23 14:48:06 +0200 |
---|---|---|
committer | Werner Zeh <werner.zeh@siemens.com> | 2018-08-27 06:31:27 +0000 |
commit | 56508967d8b433b2821d54207370332e1f319354 (patch) | |
tree | 136e5408a17b0d396a659a421f070fa24e5a54b5 /src/include/device/pci_ids.h | |
parent | c5cca15cce060699256cb7f81aeefb39065ac3bd (diff) | |
download | coreboot-56508967d8b433b2821d54207370332e1f319354.tar.xz |
siemens/mc_apl1: Disable PCI clock outputs on XIO bridge
This patch disables the unused PCI clock outputs on the XIO2001 PCI
Express to PCI Bridge.
Change-Id: I0b9cf51a713f4ab46e71d250397486d136c26177
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/28284
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Diffstat (limited to 'src/include/device/pci_ids.h')
-rw-r--r-- | src/include/device/pci_ids.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index 4ced4a5b27..bde150f304 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -782,6 +782,7 @@ #define PCI_VENDOR_ID_TI 0x104c #define PCI_DEVICE_ID_TI_TVP4010 0x3d04 #define PCI_DEVICE_ID_TI_TVP4020 0x3d07 +#define PCI_DEVICE_ID_TI_XIO2001 0x8240 #define PCI_DEVICE_ID_TI_1130 0xac12 #define PCI_DEVICE_ID_TI_1031 0xac13 #define PCI_DEVICE_ID_TI_1131 0xac15 |