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| author | Martin Roth <martinroth@chromium.org> | 2020-02-05 16:46:30 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-03-25 10:49:08 +0000 |
| commit | dafcc7a26dece2cbd73a6a4f761b3fb3963bd260 (patch) | |
| tree | 49c86ce6988e785adff903d8b8814294a98e9806 /src/include/device/pci_rom.h | |
| parent | a616a4be366c6af1f8ccfbfd1f16a4572c7e6c91 (diff) | |
| download | coreboot-dafcc7a26dece2cbd73a6a4f761b3fb3963bd260.tar.xz | |
Rework map_oprom_vendev to add revision check and mapping
AMD's Family 17h SoCs share the same video device ID, but may need
different video BIOSes. This adds the common code changes to check the
vendor & device IDs along with the revision and select the correct video
BIOS to use.
Change-Id: I2978a5693c904ddb09d23715cb309c4a356e0370
Signed-off-by: Martin Roth <martinroth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/2040455
Reviewed-by: Raul E Rangel <rrangel@chromium.org>
Reviewed-by: Matt Papageorge <matt.papageorge@amd.corp-partner.google.com>
Reviewed-by: Justin Frodsham <justin.frodsham@amd.corp-partner.google.com>
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39793
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/include/device/pci_rom.h')
| -rw-r--r-- | src/include/device/pci_rom.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/include/device/pci_rom.h b/src/include/device/pci_rom.h index 82f3c40005..47db52cf19 100644 --- a/src/include/device/pci_rom.h +++ b/src/include/device/pci_rom.h @@ -45,6 +45,7 @@ pci_rom_write_acpi_tables(struct device *device, void pci_rom_ssdt(struct device *device); +void map_oprom_vendev_rev(u32 *vendev, u8 *rev); u32 map_oprom_vendev(u32 vendev); int verified_boot_should_run_oprom(struct rom_header *rom_header); |