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| author | Andrey Petrov <andrey.petrov@intel.com> | 2016-11-08 08:30:06 -0800 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2016-11-30 16:46:16 +0100 |
| commit | ef9a9ea3b7585354d447ab0b3145e1b357226647 (patch) | |
| tree | f669c9bf0b145e1212ac40cb33404c2f24de7bb5 /src/include/device/pcix.h | |
| parent | 4ed99ad067a7bd9f5ef6004c7b0e5f9f7edbe0d5 (diff) | |
| download | coreboot-ef9a9ea3b7585354d447ab0b3145e1b357226647.tar.xz | |
soc/intel/common: Add save/restore for variable MRC data
Piggy-back on existing MRC cache infrastructure to store variable MRC data.
Only one set of data can be valid at given point of time. Currently this
magically happens because region alignment is forced to 0x1000 and region
itself is of the same size. This needs to be somehow programmatically
enforced.
Change-Id: I8a660d356ca760b8ff9907396fb9b34cb16cf1db
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-on: https://review.coreboot.org/17320
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/include/device/pcix.h')
0 files changed, 0 insertions, 0 deletions