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authorKrzysztof Sywula <krzysztof.m.sywula@intel.com>2018-07-17 10:45:21 -0700
committerSubrata Banik <subrata.banik@intel.com>2018-08-01 06:49:54 +0000
commitbf7ad3775c659ab2f776b4476945588ccf441c99 (patch)
tree99854fbed9ca73b1f8dc2655a9190ffe6814a2ca /src/include/device
parentaae6b8874892cf89f4da7156faec2359d2f303b5 (diff)
downloadcoreboot-bf7ad3775c659ab2f776b4476945588ccf441c99.tar.xz
soc/intel/common/block: Add WhiskeyLake (WHL) IDs
Specifically PCI device ID for graphics and PCI device ID for northbridge. Change-Id: Ide237d3274df0543409c8a23b9bb50c8e0a6b7a3 Signed-off-by: Krzysztof Sywula <krzysztof.m.sywula@intel.com> Reviewed-on: https://review.coreboot.org/27519 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subrata.banik@intel.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Kin Wai Ng <kin.wai.ng@intel.com>
Diffstat (limited to 'src/include/device')
-rw-r--r--src/include/device/pci_ids.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h
index 40f2ea4918..7a2666700c 100644
--- a/src/include/device/pci_ids.h
+++ b/src/include/device/pci_ids.h
@@ -2873,6 +2873,7 @@
#define PCI_DEVICE_ID_INTEL_APL_IGD_HD_500 0x5a85
#define PCI_DEVICE_ID_INTEL_GLK_IGD 0x3184
#define PCI_DEVICE_ID_INTEL_GLK_IGD_EU12 0x3185
+#define PCI_DEVICE_ID_INTEL_WHL_GT2_ULT_1 0x3EA0
#define PCI_DEVICE_ID_INTEL_CNL_GT2_ULX_1 0x5A51
#define PCI_DEVICE_ID_INTEL_CNL_GT2_ULX_2 0x5A59
#define PCI_DEVICE_ID_INTEL_CNL_GT2_ULX_3 0x5A41
@@ -2898,6 +2899,7 @@
#define PCI_DEVICE_ID_INTEL_KBL_ID_DT 0x591f
#define PCI_DEVICE_ID_INTEL_CNL_ID_U 0x5A04
#define PCI_DEVICE_ID_INTEL_CNL_ID_Y 0x5A02
+#define PCI_DEVICE_ID_INTEL_WHL_ID_W 0x3E34
/* Intel SMBUS device Ids */
#define PCI_DEVICE_ID_INTEL_SPT_LP_SMBUS 0x9d23