diff options
| author | Ben Chuang <benchuanggli@gmail.com> | 2020-07-16 11:34:36 +0800 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2020-08-05 15:16:16 +0000 |
| commit | 026e940f03107cdd32b6f479134d1b61f700a3de (patch) | |
| tree | e9e5ddb277253c2ddd24a597fad9806dc2ed7189 /src/include/device | |
| parent | e2497d0181f5ab20d012c761400601b15565ce58 (diff) | |
| download | coreboot-026e940f03107cdd32b6f479134d1b61f700a3de.tar.xz | |
drivers/genesyslogic/gl9763e: Add driver for Genesys Logic GL9763E
The device is a PCIe to eMMC bridge controller to be used in the
Chromebook as the boot disk. The datasheet name is GL9763E and
the revision is 02.
The patch sets single request AXI, disables ASPM L0s and enables SSC.
Signed-off-by: Ben Chuang <benchuanggli@gmail.com>
Change-Id: I158c79f5ac6e559f335b6b50092469c7b1646c56
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43751
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/include/device')
| -rw-r--r-- | src/include/device/pci_ids.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index da41cb8b39..05900da348 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -2033,6 +2033,9 @@ #define PCI_DEVICE_ID_ALTIMA_AC1000 0x03e8 #define PCI_DEVICE_ID_ALTIMA_AC9100 0x03ea +#define PCI_VENDOR_ID_GLI 0x17a0 +#define PCI_DEVICE_ID_GLI_9763E 0xe763 + #define PCI_VENDOR_ID_XGI 0x18ca #define PCI_DEVICE_ID_XGI_20 0x0020 #define PCI_DEVICE_ID_XGI_40 0x0040 |