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authorFurquan Shaikh <furquan@google.com>2020-05-02 10:24:23 -0700
committerFurquan Shaikh <furquan@google.com>2020-05-02 18:45:16 +0000
commit76cedd2c292352d7dbd45fab70ec272e476d0910 (patch)
tree21fa0e33a2324e2ab93f38a90f6efd1a49ecdd76 /src/include/device
parente0844636aca974449c7257e846ec816db683d0b9 (diff)
downloadcoreboot-76cedd2c292352d7dbd45fab70ec272e476d0910.tar.xz
acpi: Move ACPI table support out of arch/x86 (3/5)
This change moves all ACPI table support in coreboot currently living under arch/x86 into common code to make it architecture independent. ACPI table generation is not really tied to any architecture and hence it makes sense to move this to its own directory. In order to make it easier to review, this change is being split into multiple CLs. This is change 3/5 which basically is generated by running the following command: $ git grep -iIl "arch/acpi" | xargs sed -i 's/arch\/acpi/acpi\/acpi/g' BUG=b:155428745 Change-Id: I16b1c45d954d6440fb9db1d3710063a47b582eae Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40938 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Diffstat (limited to 'src/include/device')
-rw-r--r--src/include/device/azalia_device.h2
-rw-r--r--src/include/device/pci_rom.h2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/include/device/azalia_device.h b/src/include/device/azalia_device.h
index 3c8e76e7ef..a787efe889 100644
--- a/src/include/device/azalia_device.h
+++ b/src/include/device/azalia_device.h
@@ -5,7 +5,7 @@
#define DEVICE_AZALIA_H
#include <types.h>
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
#include <device/mmio.h>
#include <device/device.h>
diff --git a/src/include/device/pci_rom.h b/src/include/device/pci_rom.h
index 6b6fee2c44..c49389f396 100644
--- a/src/include/device/pci_rom.h
+++ b/src/include/device/pci_rom.h
@@ -2,7 +2,7 @@
#define PCI_ROM_H
#include <endian.h>
#include <stddef.h>
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
#define PCI_ROM_HDR 0xAA55
#define PCI_DATA_HDR ((uint32_t) (('R' << 24) | ('I' << 16) | ('C' << 8) | 'P'))