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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-06-30 10:51:31 +0300
committerMartin Roth <martinroth@google.com>2019-07-17 16:05:28 +0000
commit1557a67c83b469e183b30f26d8e2f4c8ebb7d030 (patch)
tree8989198dfaf38406b992bd93c8c31508803c0d52 /src/include/device
parent275f2e22a1a441d48a12bfe39ef3ce960efd7a04 (diff)
downloadcoreboot-1557a67c83b469e183b30f26d8e2f4c8ebb7d030.tar.xz
device: Move pci_irqs outside DEVTREE_EARLY
Only needed in ramstage, and only for MP tables. Change-Id: Ia7c1e153b948aeefa4c3bea4920b02a91a417096 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33922 Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/include/device')
-rw-r--r--src/include/device/device.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/include/device/device.h b/src/include/device/device.h
index d6f80cee0f..4ffbff4ac9 100644
--- a/src/include/device/device.h
+++ b/src/include/device/device.h
@@ -126,7 +126,6 @@ struct device {
unsigned int on_mainboard : 1;
unsigned int disable_pcie_aspm : 1;
unsigned int hidden : 1; /* set if we should hide from UI */
- struct pci_irq_info pci_irq_info[4];
u8 command;
/* Base registers for this device. I/O, MEM and Expansion ROM */
@@ -138,6 +137,7 @@ struct device {
DEVTREE_CONST struct bus *link_list;
#if !DEVTREE_EARLY
+ struct pci_irq_info pci_irq_info[4];
struct device_operations *ops;
struct chip_operations *chip_ops;
const char *name;