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authorStefan Reinauer <stepan@coresystems.de>2008-10-29 04:46:52 +0000
committerStefan Reinauer <stepan@openbios.org>2008-10-29 04:46:52 +0000
commitdebb11fc1fe5f5560015ab9905f1ccc2e08c73e0 (patch)
tree9160cd3787a3213a38f5e9b9942360bcaf753f1a /src/include/device
parentb70d1993a432af2a026c4cad0fa3dd3c5eca1ef7 (diff)
downloadcoreboot-debb11fc1fe5f5560015ab9905f1ccc2e08c73e0.tar.xz
Support for the Intel ICH7 southbridge.
This includes an early SMI handler. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3701 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/include/device')
-rw-r--r--src/include/device/device.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/include/device/device.h b/src/include/device/device.h
index 09d163cf59..284c096016 100644
--- a/src/include/device/device.h
+++ b/src/include/device/device.h
@@ -71,7 +71,7 @@ struct device {
struct device_path path;
unsigned vendor;
unsigned device;
- unsigned int class; /* 3 bytes: (base,sub,prog-if) */
+ unsigned int class; /* 3 bytes: (base, sub, prog-if) */
unsigned int hdr_type; /* PCI header type */
unsigned int enabled : 1; /* set if we should enable the device */
unsigned int initialized : 1; /* set if we have initialized the device */
@@ -85,7 +85,7 @@ struct device {
struct resource resource[MAX_RESOURCES];
unsigned int resources;
- /* link are (down sream) buses attached to the device, usually a leaf
+ /* link are (down stream) buses attached to the device, usually a leaf
* device with no children have 0 buses attached and a bridge has 1 bus
*/
struct bus link[MAX_LINKS];