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authorJulius Werner <jwerner@chromium.org>2019-12-02 18:02:51 -0800
committerPatrick Georgi <pgeorgi@google.com>2019-12-04 14:10:37 +0000
commit1c371572188a90ea16275460dd4ab6bf9966350b (patch)
tree5b9ad6854ce25f11ca516887fd85e614c3c28eb8 /src/include/device
parent41fe62b6dccd6be84e9d3685c73f1d8683af78de (diff)
downloadcoreboot-1c371572188a90ea16275460dd4ab6bf9966350b.tar.xz
mmio: Add clrsetbitsXX() API in place of updateX()
This patch removes the recently added update8/16/32/64() API and replaces it with clrsetbits8/16/32/64(). This is more in line with the existing endian-specific clrsetbits_le16/32/64() functions that have been used for this task on some platforms already. Rename clrsetbits_8() to clrsetbits8() to be in line with the new naming. Keep this stuff in <device/mmio.h> and get rid of <mmio.h> again because having both is confusing and we seem to have been standardizing on <device/mmio.h> as the standard arch-independent header that all platforms should include already. Also sync libpayload back up with what we have in coreboot. (I'm the original author of the clrsetbits_le32-definitions so I'm relicensing them to BSD here.) Change-Id: Ie4f7b9fdbdf9e8c0174427b4288f79006d56978b Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37432 Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Hung-Te Lin <hungte@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/include/device')
-rw-r--r--src/include/device/mmio.h18
1 files changed, 18 insertions, 0 deletions
diff --git a/src/include/device/mmio.h b/src/include/device/mmio.h
index 6596cf89ed..9c5e27cfd8 100644
--- a/src/include/device/mmio.h
+++ b/src/include/device/mmio.h
@@ -19,6 +19,24 @@
#include <endian.h>
#include <types.h>
+#define __clrsetbits_impl(bits, addr, clear, set) write##bits(addr, \
+ (read##bits(addr) & ~((uint##bits##_t)(clear))) | (set))
+
+#define clrsetbits8(addr, clear, set) __clrsetbits_impl(8, addr, clear, set)
+#define clrsetbits16(addr, clear, set) __clrsetbits_impl(16, addr, clear, set)
+#define clrsetbits32(addr, clear, set) __clrsetbits_impl(32, addr, clear, set)
+#define clrsetbits64(addr, clear, set) __clrsetbits_impl(64, addr, clear, set)
+
+#define setbits8(addr, set) clrsetbits8(addr, 0, set)
+#define setbits16(addr, set) clrsetbits16(addr, 0, set)
+#define setbits32(addr, set) clrsetbits32(addr, 0, set)
+#define setbits64(addr, set) clrsetbits64(addr, 0, set)
+
+#define clrbits8(addr, clear) clrsetbits8(addr, clear, 0)
+#define clrbits16(addr, clear) clrsetbits16(addr, clear, 0)
+#define clrbits32(addr, clear) clrsetbits32(addr, clear, 0)
+#define clrbits64(addr, clear) clrsetbits64(addr, clear, 0)
+
#ifndef __ROMCC__
/*
* Reads a transfer buffer from 32-bit FIFO registers. fifo_stride is the