Drop ROMCC code and header guards

Change-Id: I730f80afd8aad250f26534435aec24bea75a849c
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37334
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>

4 files changed, 0 insertions, 19 deletions

diff --git a/src/include/device/device.h b/src/include/device/device.h
index abcd0a453a..e391291084 100644
--- a/src/include/device/device.h
+++ b/src/include/device/device.h
@@ -2,13 +2,6 @@
 
 #define DEVICE_H
 
-/*
- * NOTICE: Header is ROMCC tentative.
- * This header is incompatible with ROMCC and its inclusion leads to 'odd'
- * build failures.
- */
-#if !defined(__ROMCC__)
-
 #include <device/resource.h>
 #include <device/path.h>
 #include <device/pci_type.h>
@@ -330,6 +323,4 @@ void scan_smbus(struct device *bus);
 void scan_generic_bus(struct device *bus);
 void scan_static_bus(struct device *bus);
 
-#endif /* !defined(__ROMCC__) */
-
 #endif /* DEVICE_H */
diff --git a/src/include/device/mmio.h b/src/include/device/mmio.h
index 4007cff7c3..524284a077 100644
--- a/src/include/device/mmio.h
+++ b/src/include/device/mmio.h
@@ -37,7 +37,6 @@
 #define clrbits32(addr, clear)		clrsetbits32(addr, clear, 0)
 #define clrbits64(addr, clear)		clrsetbits64(addr, clear, 0)
 
-#ifndef __ROMCC__
 /*
  * Reads a transfer buffer from 32-bit FIFO registers. fifo_stride is the
  * distance in bytes between registers (e.g. pass 4 for a normal array of 32-bit
@@ -195,6 +194,4 @@ static inline void buffer_to_fifo32(void *buffer, size_t size, void *fifo,
 #define READ32_BITFIELD(addr, name) \
 	EXTRACT_BITFIELD(read32(addr), name)
 
-#endif	/* !__ROMCC__ */
-
 #endif	/* __DEVICE_MMIO_H__ */
diff --git a/src/include/device/pci_mmio_cfg.h b/src/include/device/pci_mmio_cfg.h
index 30945f4c27..aa159705d1 100644
--- a/src/include/device/pci_mmio_cfg.h
+++ b/src/include/device/pci_mmio_cfg.h
@@ -20,7 +20,6 @@
 #include <device/mmio.h>
 #include <device/pci_type.h>
 
-#if !defined(__ROMCC__)
 
 /* By not assigning this to CONFIG_MMCONF_BASE_ADDRESS here we
  * prevent some sub-optimal constant folding. */
@@ -110,8 +109,6 @@ uint32_t *pci_mmio_config32_addr(pci_devfn_t dev, uint16_t reg)
 	return (uint32_t *)&pcicfg(dev)->reg32[reg / sizeof(uint32_t)];
 }
 
-#endif /* !defined(__ROMCC__) */
-
 #if CONFIG(MMCONF_SUPPORT)
 
 #if CONFIG_MMCONF_BASE_ADDRESS == 0
diff --git a/src/include/device/pci_ops.h b/src/include/device/pci_ops.h
index 9d64f037f6..805c087de7 100644
--- a/src/include/device/pci_ops.h
+++ b/src/include/device/pci_ops.h
@@ -23,7 +23,6 @@
 #include <device/pci_type.h>
 #include <arch/pci_ops.h>
 
-#ifndef __ROMCC__
 void __noreturn pcidev_die(void);
 
 static __always_inline pci_devfn_t pcidev_bdf(const struct device *dev)
@@ -37,7 +36,6 @@ static __always_inline pci_devfn_t pcidev_assert(const struct device *dev)
 		pcidev_die();
 	return pcidev_bdf(dev);
 }
-#endif
 
 #if defined(__SIMPLE_DEVICE__)
 #define ENV_PCI_SIMPLE_DEVICE 1
@@ -184,7 +182,6 @@ void pci_update_config32(const struct device *dev, u16 reg, u32 mask, u32 or)
 u16 pci_s_find_next_capability(pci_devfn_t dev, u16 cap, u16 last);
 u16 pci_s_find_capability(pci_devfn_t dev, u16 cap);
 
-#ifndef __ROMCC__
 static __always_inline
 u16 pci_find_next_capability(const struct device *dev, u16 cap, u16 last)
 {
@@ -196,6 +193,5 @@ u16 pci_find_capability(const struct device *dev, u16 cap)
 {
 	return pci_s_find_capability(PCI_BDF(dev), cap);
 }
-#endif
 
 #endif /* PCI_OPS_H */